LTC2000 16-/14-/11-Bit 2.5Gsps DACs FEATURES DESCRIPTION n 80dBc SFDR at 70MHz f The LTC 2000 is a family of 16-/14-/11-bit 2.5Gsps cur- OUT n >68dBc SFDR from DC to 1000MHz f rent steering DACs with exceptional spectral purity. OUT n 40mA Nominal Full-Scale, 1V Output Compliant The single (1.25Gsps mode) or dual (2.5Gsps mode) port n 10mA to 60mA Adjustable Full-Scale Current Range source synchronous LVDS interface supports data rates of n Single or Dual Port DDR LVDS and DHSTL Interface up to 1.25Gbps using a 625MHz DDR data clock, which n Low Latency (7.5 Cycles for Single Port, can be either in quadrature or in phase with the data. An 11 Cycles for Dual Port) internal synchronizer automatically aligns the data with n >78dBc 2-Tone IMD from DC to 1000MHz f OUT the DAC sample clock. n 165dBc/Hz Additive Phase Noise at 1MHz Offset for Additional features such as pattern generation, LVDS loo- 65MHz f OUT n pout and junction temperature sensing simplify system 170-Lead (9mm 15mm) BGA Package development and testing. A serial peripheral interface (SPI) port allows configura- APPLICATIONS tion and read back of internal registers. Operating from n Broadband Communication Systems 1.8V and 3.3V supplies, the LTC2000 consumes 2.2W at n DOCSIS CMTS 2.5Gsps and 1.3W at 1.25Gsps. n Direct RF Synthesis All registered trademarks and trademarks are the property of their respective owners. Protected n by U.S. Patents, including 8330633. Radar n Instrumentation n Automatic Test Equipment BLOCK DIAGRAM TSTP/N PD CS SCK SDI SDO SV DD JUNCTION PATTERN SPI TEMPERATURE GENERATOR SFDR vs f , f = 2.5Gsps OUT DAC 100 DAP/N 15:0 DIGITAL AMPLITUDE = 0dBFS I = 40mA OUTFS I OUTP 90 50 4:1 16-BIT DAC 80 DBP/N 15:0 50 I OUTN 70 GAIN ADJUST 60 DCKIP/N CLOCK DELAY FSADJ ADJUST SYNC 50 0 400 600 800 1000 1200 REFIO 200 DCKOP/N CLK DIVIDER CLK f (MHz) OUT 2 OR 4 RECEIVER 10k 2000 TA01b REF AV DV AV DV GND CKP/N DD18 DD18 DD33 DD33 2000 BD 2000fb 1 For more information www.linear.com/LTC2000 LVDS RECEIVERS DDR DATA FLIP-FLOPS SFDR (dBc)LTC2000 TABLE OF CONTENTS Features ..................................................... 1 Divided Clock Output (DCKOP/N) ............................26 Applications ................................................ 1 LVDS Data Clock Input (DCKIP/N) ..........................26 Block Diagram .............................................. 1 LVDS Data Input Ports (DAP/N, DBP/N) .................27 Description.................................................. 1 Clock Synchronizer .................................................28 Absolute Maximum Ratings .............................. 3 Minimizing Harmonic Distortion .............................30 Pin Configuration .......................................... 3 Measuring LVDS Input Timing Skew .......................30 Order Information .......................................... 4 Measuring Internal Junction Temperature (T ) .......33 J Electrical Characteristics ................................. 5 Pattern Generator ...................................................33 Timing Characteristics .................................... 8 SPI Register Summary ................................... 34 Typical Performance Characteristics ................... 9 Applications Information ................................ 35 Pin Functions .............................................. 17 Sample Start-Up Sequence .....................................35 Block Diagram ............................................. 18 Output Configurations ...........................................36 Timing Diagrams ......................................... 19 Generating the DAC Sample Clock ..........................36 Operation................................................... 19 Synchronizing Multiple LTC2000s in Introduction ............................................................ 19 Dual-Port Mode ......................................................37 Dual-Port Mode ......................................................20 Synchronizing Multiple LTC2000s in Single-Port Mode ....................................................20 Single-Port Mode ....................................................40 Serial Peripheral Interface (SPI) .............................23 PCB Layout Considerations .................................... 41 Power-On Reset ......................................................23 Pin Locations (LTC2000-16) ............................ 46 Power Down ...........................................................23 Pin Locations (LTC2000-14) ............................ 48 Reference Operation ...............................................23 Pin Locations (LTC2000-11) ............................ 50 Setting the Full-Scale Current ................................. 24 Package Description ..................................... 52 DAC Transfer Function ............................................25 Revision History .......................................... 53 Analog Outputs (I ) ........................................25 Typical Application ....................................... 54 OUTP/N DAC Sample Clock (CKP/N) ....................................26 Related Parts .............................................. 54 2000fb 2 For more information www.linear.com/LTC2000