LTC2668 16-Channel 16-/12-Bit 10V V SoftSpan DACs with OUT 10ppm/C Max Reference Features Description n Precision Reference 10ppm/C Max The LTC 2668 is a family of 16-channel, 16-/12-bit 10V n Independently Programmable Output Ranges: digital-to-analog converters with integrated precision 0V to 5V, 0V to 10V, 2.5V, 5V, 10V references. They are guaranteed monotonic and have n Full 16-Bit/12-Bit Resolution at All Ranges built-in rail-to-rail output buffers. These SoftSpan DACs n Maximum INL Error: 4LSB at 16 Bits offer five output ranges up to 10V. The range of each n A/B Toggle via Software or Dedicated Pin channel is independently programmable, or the part can n 16:1 Analog Multiplexer be hardware-configured for operation in a fixed range. n Guaranteed Monotonic Over Temperature The integrated 2.5V reference is buffered separately to each n Internal or External Reference channel an external reference can be used for additional n Outputs Drive 10mA Guaranteed range options. The LTC2668 also includes A/B toggle n 1.8V to 5V SPI Serial interface capability via a dedicated pin or software toggle command. n 6mm 6mm 40-Lead QFN Package The SPI/Microwire-compatible 3-wire serial interface a operates on logic levels as low as 1.71V at clock rates up to 50MHz. n Optical Networking L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and n Instrumentation SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Data Acquisition n Automatic Test Equipment n Process Control and Industrial Automation Block Diagram Integral Nonlinearity (LTC2668-16) REFCOMP 34 INTERNAL REFERENCE 33 REF 38 36 4 OVRTMP AVP 10V RANGE + V V V GND REF REF 3 14, 37 10, 31 REFLO V 2 13, 35 MUX MUX 11, 32 1 V 2 DAC 0 DAC 15 30 V OUT0 OUT15 V V 3 29 OUT1 OUT14 0 V 4 28 V OUT2 OUT13 1 V V 5 27 OUT3 OUT12 2 V 6 26 V OUT4 V V OUT11 REF REF 3 V 7 25 V OUT5 OUT10 MUX MUX V 8 24 V 4 OUT6 OUT9 0 16384 32768 49152 65535 V 9 DAC 7 DAC 8 23 V OUT7 OUT8 CODE 21 CLR 2668 TA01b 15 LDAC CS/LD 16 TGP 20 SCK 17 CONTROL LOGIC DECODE 39 MSP0 SDI 19 40 MSP1 32-BIT SHIFT REGISTER POWER-ON RESET SDO 18 1 MSP2 MUX 12 MONITOR MUX TOGGLE SELECT REGISTER 22 OVP 2668 TA01a 2668fa 1 For more information www.linear.com/LTC2668 SPAN REGISTER SPAN REGISTER SPAN SPAN RGSTR B RGSTR A RGSTR B RGSTR A RGSTR B RGSTR A RGSTR B RGSTR A SPAN SPAN SPAN REGISTER SPAN REGISTER INL (LSB) pplicationsLTC2668 aB solute m aximum r p in c F (Notes 1, 2) TOP VIEW Analog Supply Voltage (AVP) ....................... 0.3V to 6V Digital I/O Voltage (OVP) .............................. 0.3V to 6V REFLO ....................................................... 0.3V to 0.3V + 40 39 38 37 36 35 34 33 32 31 V ............................................................ 0.3V to 16.5V MSP2 1 30 V OUT15 V ..........................................................16.5V to 0.3V V 2 29 V OUT0 OUT14 CS/LD, SCK, SDI, LDAC, CLR, TGP .............. 0.3V to 6V V 3 28 V OUT1 OUT13 MSP0, MSP1, MSP2 ....... 0.3V to Min (AVP + 0.3V, 6V) V 4 27 V OUT2 OUT12 + V to V , MUX ...V 0.3V to V + 0.3V (Max 16.5V) V V OUT0 OUT15 5 26 OUT3 OUT11 41 V V REF, REFCOMP ............... 0.3V to Min (AVP + 0.3V, 6V) 6 25 V OUT4 OUT10 V 7 24 V OUT5 OUT9 SDO ................................0.3V to Min (OVP + 0.3V, 6V) V 8 23 V OUT6 OUT8 OVRTMP ....................................................... 0.3V to 6V V 9 22 OVP OUT7 Operating Temperature Range + V 10 21 CLR LTC2668C ................................................ 0C to 70C 11 12 13 14 15 16 17 18 19 20 LTC2668I .............................................40C to 85C LTC2668H .......................................... 40C to 125C Maximum Junction Temperature .......................... 150C UJ PACKAGE 40-LEAD (6mm 6mm) PLASTIC QFN Storage Temperature Range .................. 65C to 150C T = 150C, = 33C/W, = 2C/W JMAX JA JC EXPOSED PAD IS V , MUST BE SOLDERED TO PCB 2668fa 2 For more information www.linear.com/LTC2668 V MSP1 MUX MSP0 REFLO OVRTMP GND GND LDAC AVP CS/LD REFLO SCK REFCOMP SDO REF SDI V + TGP V iguration on atings