LTC3718 Low Input Voltage DC/DC Controller for DDR/QDR Memory Termination FEATURES DESCRIPTIO n Very Low V : 1.5V The LTC 3718 is a high current, high efficiency synchro- IN(MIN) TM n Ultrafast Transient Response nous switching regulator controller for DDR and QDR n True Current Mode Control memory termination. It operates from an input as low as n 5V Drive for N-Channel MOSFETs Eliminates 1.5V and provides a regulated output voltage equal to Auxillary 5V Supply (0.5)V . The controller uses a valley current control IN n No Sense Resistor Required architecture to enable high frequency operation with very n Uses Standard 5V Logic-Level N-Channel MOSFETs low on-times without requiring a sense resistor. Operating n V : 0.4V frequency is selected by an external resistor and is com- OUT(MIN) n V Tracks 1/2 V or External V pensated for variations in V and V . The LTC3718 uses OUT IN REF IN OUT n Symmetrical Source and Sink Output Current Limit a pair of standard 5V logic level N-channel external n Adjustable Switching Frequency MOSFETs, eliminating the need for expensive P-channel n t <100ns or low threshold devices. ON(MIN) n Power Good Output Voltage Monitor Forced continuous operation reduces noise and RF inter- n Programmable Soft-Start ference. Fault protection is provided by internal foldback n Output Overvoltage Protection current limiting, an output overvoltage comparator and an n Optional Short-Circuit Shutdown Timer optional short-circuit timer. Soft-start capability for sup- n Small 24-Lead SSOP Package ply sequencing can be accomplished using an external U timing capacitor. OPTI-LOOP compensation allows the APPLICATIO S transient response to be optimized over a wide range of n Bus Termination: DDR/QDR Memory, SSTL, HSTL, ... loads and output capacitors. n Servers, RAID Systems , LTC and LT are registered trademarks of Linear Technology Corporation. OPTI-LOOP is a registered trademark of Linear Technology Corporation. No R is a n SENSE Distributed Power Systems trademark of Linear Technology Corporation. QDR RAMs and Quad Data Rate RAMs comprise a n new family of products developed by Cypress Semiconductor, IDT and Micron Technology, Inc. Synchronous Buck with General Purpose Boost TYPICAL APPLICATIO V IN 2.5V C IN1 D B 22F CMDSH-3 2 SHDN BOOST C B Efficiency vs Load Current 0.33F D1 M1 V TG REF B340A R Si7440DP ON 100 LTC3718 237k V = 2.5V IN I SW1 90 ON V = 1.25V OUT + V V SENSE 80 OUT FB1 L1 0.8H V OUT PGOOD PGND1 1.25V 70 C SS 10A + C 0.1F OUT SENSE 60 470F M2 D2 RUN/SS BG 2 50 Si7440DP B340A C1 820pF X7R INTV CC R 4.75k 40 C I V TH IN1 30 SGND1 V V IN2 IN 20 C IN2 4.7F L2 10 SGND2 PGND2 FIGURE 1 CIRCUIT 4.7H 0 V SW2 FB2 0.01 0.1 1 10 100 D3 C VCC1 LOAD CURRENT (A) R 12.1k R 37.4k F1 F2 MBR0520 10F 3718 G05/TA01a C : SANYO POSCAP 4TPB470M L1: SUMIDA CEP125-0R8MC L2: PANASONIC ELJPC4R7MF OUT 3718 TA01 Figure 1. High Efficiency Bus Termination Supply without Auxiliary 5V Supply 3718fa 1 EFFICIENCY (%) U ULTC3718 UUW ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO (Note 1) ORDER PART Input Supply Voltage (V ) .......................10V to 0.3V IN2 TOP VIEW NUMBER Boosted Topside Driver Supply Voltage 1 BOOST RUN/SS 24 (BOOST) ............................................... 42V to 0.3V 2 TG V 23 ON LTC3718EG V , I , SW1 Voltage ............................. 36V to 0.3V IN1 ON 3 SW1 PGOOD 22 + RUN/SS, PGOOD Voltages ......................... 7V to 0.3V 4 SENSE V 21 RNG V , V , V Voltages .......(INTV + 0.3V) to 0.3V 5 SENSE I 20 ON REF RNG CC TH 6 PGND1 I , V Voltages .................................... 2.7V to 0.3V SGND1 19 TH FB1 7 BG I 18 SW2 Voltage ............................................. 36V to 0.4V ON 8 INTV V 17 CC V Voltage ................................................. V + 0.3V FB1 FB2 IN2 9 V V 16 IN1 REF SHDN Voltage ......................................................... 10V 10 V SHDN 15 IN2 TG, BG, INTV Peak Currents.................................. 2A CC 11 PGND2 SGND2 14 TG, BG, INTV RMS Currents ............................ 50mA CC 12 SW2 V 13 FB2 Operating Ambient Temperature G PACKAGE Range (Note 4) ................................... 40 C to 85 C 24-LEAD PLASTIC SSOP Junction Temperature (Note 2)............................ 125 C T = 125 C, q = 130 C/ W JMAX JA Storage Temperature Range ................. 65 C to 150 C Lead Temperature (Soldering, 10 sec).................. 300 C Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The l denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25 C. V = 15V, V = 1.5V unless otherwise noted. A IN1 IN2 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Buck Regulator I Input DC Supply Current (V ) Q(VIN1) IN1 Normal 1000 2000 m A Shutdown Supply Current V = 0V 15 30 m A RUN/SS V Feedback Voltage Accuracy I = 1.2V (Note 3) l 0.65 0.1 0.65 % FB1 TH D V Feedback Voltage Line Regulation V = 4V to 36V, I = 1.2V (Note 3) 0.002 %/V FB1(LINE) IN1 TH D V Feedback Voltage Load Regulation I = 0.5V to 1.9V (Note 3) l 0.05 0.3 % FB1(LOAD) TH g Error Amplifier Transconductance I = 1.2V (Note 3) 0.93 1.13 1.33 mS m(EA) TH t On-Time I = 60m A, V = 1.5V 200 250 300 ns ON ON ON I = 30m A, V = 1.5V 400 500 600 ns ON ON t Minimum On-Time I = 180m A 50 100 ns ON(MIN) ON t Minimum Off-Time 300 400 ns OFF(MIN) V Maximum Current Sense Threshold V = 1V, V = V /2 50mV l 108 135 162 mV SENSE(MAX) RNG FB1 REF V V (Source) V = 0V, V = V /2 50mV l 76 95 114 mV PGND SW1 RNG FB1 REF V = INTV , V = V /2 50mV l 148 185 222 mV RNG CC FB1 REF V Minimum Current Sense Threshold V = 1V, V = V /2 + 50mV 140 165 190 mV SENSE(MIN) RNG FB1 REF V V (Sink) V = 0V, V = V /2 + 50mV 97 115 133 mV PGND SW1 RNG FB1 REF V = INTV , V = V /2 + 50mV 200 235 270 mV RNG CC FB1 REF D V Output Overvoltage Fault Threshold 8 10 12 % FB1(OV) D V Output Undervoltage Fault Threshold 25 % FB1(UV) V RUN Pin Start Threshold l 0.8 1.5 2 V RUN/SS(ON) V RUN Pin Latchoff Enable RUN/SS Pin Rising 4 4.5 V RUN/SS(LE) 3718fa 2 U WWW