LTM4664 54V Dual 25A, Single 50A Module Regulator IN with Digital Power System Management FEATURES DESCRIPTION n Complete 48V Input to Low Voltage Dual 25A Supply The LTM 4664 is a complete nonisolated 48V input high that Can Scale to 300A efficiency step-down Module regulator with dual 25A n Dual Analog Loops with Digital Interface for outputs. The switching controllers, power MOSFETs, inductors Compensation, Control and Monitoring and supporting components are included. Only external n Input Voltage Range: 30V to 58V capacitors are needed to complete the design. Operating over n Output Voltage Range: 0.5V to 1.5V a 30V to 58V input voltage range, the LTM4664 supports an n 3% Output Current Readback Accuracy (20 to 125C) output voltage of 0.5V to 1.5V at up to 75W. An intermediate n 88% Efficiency for 48V to 1V at 50A output at 25% V is also available. The LTM4664 product IN n 0.5% Output Voltage Accuracy Over Temperature video is available on the website. 2 n 400kHz PMBus-Compliant I C Serial Interface The LTM4664 dual 25A regulators utilize digitally program- n 16mm 16mm 7.72mm BGA Package mable analog control loops, precision data acquisition cir- cuitry and EEPROM with ECC. The LTM4664s 2-wire serial APPLICATIONS interface allows the 25A outputs to be margined, tuned n 48V Systems and ramped up and down at programmable slew rates and n Computer and Networking Equipment sequencing delay times. True input current sense, output n Electronic Test Equipment currents and voltages, input and output power, tempera- n Storage Systems tures, uptime and peak values are all readable. All registered trademarks and trademarks are the property of their respective owners. Protected Click to view associated TechClip Videos. by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258, 7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide. TYPICAL APPLICATION 48V to VCORE at 50A 48V CER 4:1 VOLTAGE DIVIDER INTV CCS1 CER CBULK PINS NOT SHOWN: CFLY1 CFLY2 + VOUT2 SET, OVP TRIP, VP SET, INSNSS2 , INSNSS2 , 10k UVS1, UVS2, HYS PRGM1, HYS PRGM2, TIMERS1, + ON/OFF TIMERS2, INSNSS1 , INSNSS1 , FAULTS1, FAULTS2 INTV CC 10k PGOODS2 48V to 1V at 50A PGOODS2 PGOODVCORE PGOOD C0 V OUT2 91 V OUT2 SWC0 90 FREQS1 CER VCORE50A 89 CBULK V OUTC0 FREQS2 RFREQS1 RFREQS2 C 88 OUT1 C OUT3 INTV GND CCS1 INTV CCS1 87 4.7F SGND C0 C1 86 EXTV + CCS1 V C0 OSNS V OUT2 85 EXTVCCS2 LOAD V C0 OSNS INTV 1F CCS2 84 V DD33 INTV LTM4664 CCS2 PGOOD C1 PGOODVCORE 4.7F 83 + 82 IN SWC1 10k V OUT2 IN V 81 OUTC1 CER 80 V C INS3 C0 OUT3 C OUT4 10k 0 5 10 15 20 25 30 35 40 45 50 GND V INS3 C1 SGND C0 C1 4664 TA01b OUTPUT CURRENT (A) SYNC + V C1 10k 10k 10k 10k OSNS SHARECLK SCL V C1 OSNS SDA ALERT PGOODS2 INTV CC RSEL VDD25 TWO PHASE 50A SECTION COMPH0 4.7F PINS NOT SHOWN: COMPH1 VOUTC0 CFG, VTRIMC0 CFG, VOUTC1 CFG, VTRIMC1 CFG, FSWPH CFG, TSNSC0a, TSNSC0b, TSNSC1a, TSNSC1b, PWM C0, V DD33 PWM C1, GL C0, GL C1, PHFLT C0, PHFLT C1, EXTV CC 4664 TA01a Rev. B 1 Document Feedback For more information www.analog.com SW4 ASEL SW3 V INS2 COMP C1b COMP C0b V INS2F COMP C0a RUNS2 COMP C1a PGOODS1 V OUT1 RUN C0 PGOODS2 RUN C1 SW2 V DD33 SW1 INTV CC V INS1 RUNS1 V DD25 EFFICIENCY (%)LTM4664 TABLE OF CONTENTS Features ..................................................... 1 INTV /EXTV Power ..........................................40 CC CC Applications ................................................ 1 Output Current Sensing and Sub Milliohm DCR Typical Application ........................................ 1 Current Sensing ..................................................... 41 Description.................................................. 1 Input Current Sensing ............................................ 41 Absolute Maximum Ratings .............................. 4 PolyPhase Load Sharing ........................................ 41 Pin Configuration .......................................... 4 External/Internal Temperature Sense .....................42 Order Information .......................................... 5 RCONFIG (Resistor Configuration) Pins .................42 Electrical Characteristics ................................. 5 Fault Detection and Handling .................................45 Typical Performance Characteristics .................. 15 Status Registers and ALERT Masking ....................46 4:1 Divider Block Diagram .............................. 25 Mapping Faults to FAULT Pins ...............................48 Dual 25A Power System Management (PSM) Power Good Pins ...................................................48 BlockDiagram ............................................. 26 CRC Protection ......................................................48 4:1 Divider Operation .................................... 27 Serial Interface ......................................................48 4:1 Divider Description ...........................................27 Communication Protection ....................................48 Main Control ...........................................................27 Device Addressing .................................................48 INTV /EXTV Power ................................27 Responses to V and I /I Faults ..................49 CCS1,2 CCS1,2 OUT IN OUT Start-Up and Shutdown ..........................................28 Output Overvoltage Fault Response .......................49 Fault Protection and Thermal Shutdown .................28 Output Undervoltage Response .............................50 High Side Current Sensing ......................................28 Peak Output Overcurrent Fault Response ..............50 Frequency Selection ................................................28 Responses to Timing Faults ...................................50 Power Good and UV (PGOODSn and UVSn pins)....29 Responses to V OV Faults ...................................50 IN Additional Overvoltage Protection ..........................29 Responses to OT/UT Faults ....................................50 4:1 Divider Application Information .................... 30 Internal Overtemperature Fault Response ..............50 Voltage Divider Pre-Balance Before Switching........30 External Overtemperature and Undertemperature Overcurrent Protection ...........................................31 FaultResponse .................................................... 51 Window Comparator Programming ........................31 Responses to Input Overcurrent and Output Effective Open Loop Output Resistance and Undercurrent Faults ............................................... 51 LoadRegulation ......................................................32 Responses to External Faults ................................. 51 Undervoltage Lockout .............................................32 Fault Logging ......................................................... 51 Fault Response and Timer Programming ................32 Bus Timeout Protection ......................................... 51 2 Design Example ......................................................33 Similarity Between PMBus, SMBus and I C Dual 25A PSM Operation ................................ 35 2-WireInterface .....................................................52 PSM Section Overview, Major Features ..................35 PMBus Serial Digital Interface ...............................52 EEPROM with ECC .................................................36 Figure11 thru Figure28 PMBus Protocols .............54 Power-Up and Initialization ....................................37 PMBus Command Summary ............................ 57 Soft-Start ...............................................................38 PMBus Commands ................................................57 Time-Based Sequencing ........................................38 Dual 25A PSM Applications Information .............. 63 Voltage-Based Sequencing ....................................38 V to V Step-Down Ratios ...............................63 IN OUT Shutdown ..............................................................39 Input Capacitors ....................................................63 Light-Load Current Operation ................................39 Output Capacitors ..................................................63 Switching Frequency and Phase .............................40 Light Load Current Operation .................................63 PWM Loop Compensation .....................................40 Switching Frequency and Phase ............................64 Output Voltage Sensing .........................................40 Output Current Limit Programming .......................65 Minimum On-Time Considerations .........................66 Rev. B 2 For more information www.analog.com