EVALUATION KIT AVAILABLE Click here to ask about the production status of specific part numbers. 2 MAX14933 Two-Channel, 2.75kV I C Isolator RMS General Description Benefits and Features 2 The MAX14933 is a two-channel, 2.75kV I C digital isola- RMS Robust Galvanic Isolation of Digital Signals tor utilizing Maxims proprietary process technology. For Withstands 2.75kV for 60s (V ) RMS ISO applications requiring 5kV of isolation, refer to the RMS Continuously Withstands 443V (V ) RMS IOWM MAX14937 data sheet. The MAX14933 transfers digital 630V Repetitive Peak Voltage (V ) PEAK IORM signals between circuits with different power domains at Withstands 10kV Surge per IEC 61000-4-5 ambient temperatures up to +125C. 2 Packages (4mm or 8mm Creepage and Clearance) The device offers two bidirectional, open-drain channels Interfaces Directly with Most Micros and FPGAs 2 for applications, such as I C, that require data to be Accepts 2.25V to 5.5V Supplies transmitted in both directions on the same line. To prevent Bidirectional Data Transfer from DC to 1.7MHz latch-up action, the A-side outputs comprise special buf- Low Power Consumption fers that regulate the logic-low voltage at 0.9V (max), and 5.3mA per Channel Typical at 1.7MHz the input logic-low threshold is at least 50mV lower than Safety Regulatory Approvals the output logic-low voltage. The B side features conven- tional buffers that do not regulate logic-low output voltage. UL According to UL1577 cUL According to CSA Bulletin 5A The device features independent 2.25V to 5.5V VDE 0884-11 Basic Insulation supplies on each side of the isolator. The device operates 2 from DC to 1.7MHz and can be used in isolated I C busses with clock stretching. The MAX14933 is available in both a 16-pin wide-body (10.3mm x 7.5mm) and narrow-body (9.9mm x 3.9mm) Ordering Information appears at end of data sheet. SOIC package. All devices are rated for operation at ambient temperatures of -40C to +125C. Applications 2 I C, SMBus, PMBus Interfaces Power Supplies Battery Management Instrumentation Functional Diagram V V DDA DDB MAX14933 I/OA1 I/OB1 2.75kVRMS DIGITAL ISOLATOR I/OA2 I/OB2 GNDA GNDB PMBus is a trademark of SMIF, Inc. 19-7533 Rev 4 11/202 MAX14933 Two-Channel, 2.75kV I C Isolator RMS Absolute Maximum Ratings V to GNDA ........................................................-0.3V to +6V Continuous Power Dissipation (T = +70C) DDA A V to GNDB ........................................................-0.3V to +6V Wide SOIC (derate 14.1mW/C above +70C) ......1126.8mW DDB I/OA to GNDA ........................................................-0.3V to +6V Narrow SOIC (derate 20mW/C above +70C)..........1600mW I/OB to GNDB ........................................................-0.3V to +6V Operating Temperature Range ......................... -40C to +125C Short-Circuit Duration Maximum Junction Temperature .....................................+150C (I/OA to GNDA, I/OB to GNDB) ........................Continuous Storage Temperature Range ............................ -65C to +150C Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) ......................................+260C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information 16 Wide SOIC Package Code W16M+8 Outline Number 21-0042 Land Pattern Number 90-0107 THERMAL RESISTANCE, FOUR-LAYER BOARD Junction to Ambient ( ) 71C/W JA Junction to Case ( ) 23C/W JC 16 Narrow SOIC Package Code S16M+11 Outline Number 21-0041 Land Pattern Number 90-0442 THERMAL RESISTANCE, FOUR-LAYER BOARD Junction to Ambient ( ) 50C/W JA Junction to Case ( ) 8C/W JC For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a +, , or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Maxim Integrated 2 www.maximintegrated.com