EVALUATION KIT AVAILABLE MAX15024/MAX15025 Single/Dual, 16ns, High Sink/Source Current Gate Drivers General Description Features The MAX15024/MAX15025 single/dual, high-speed 8A Peak Sink Current/4A Peak Source Current MOSFET gate drivers are capable of operating at fre- (MAX15024) quencies up to 1MHz with large capacitive loads. The MAX15024 includes internal source-and-sink output 4A Peak Sink Current/2A Peak Source Current transistors with independent outputs allowing for control (MAX15025) of the external MOSFETs rise and fall time. The Low 16ns Propagation Delay MAX15024 is a single gate driver capable of sinking an 8A peak current and sourcing a 4A peak current. The 4.5 V to 28V Supply Voltage Range MAX15025 is a dual gate driver capable of sinking a 4A On-Board Adjustable LDO for Gate-Drive peak current and sourcing a 2A peak current. An inte- grated adjustable LDO voltage regulator provides gate- Amplitude Control and Optimization drive amplitude control and optimization. Separate Output Driver Supply The MAX15024A and MAX15025A/C accept transistor- Independent Source and Sink Outputs (MAX15024) to-transistor (TTL) input logic levels while the MAX15024B and MAX15025B/D accept CMOS-input Matched Delays Between Inverting and logic levels. High sourcing/sinking peak currents, a low Noninverting Inputs (MAX15024) propagation delay, and thermally enhanced packages make the MAX15024/MAX15025 ideal for high-frequency Matched Delays Between Channels (MAX15025) and high-power circuits. The MAX15024/MAX15025 CMOS or TTL Logic-Level Inputs with Hysteresis operate from a 4.5V to 28V supply. A separate output dri- ver supply input enhances flexibility and permits a soft- for Noise Immunity start of the power MOSFETs used in synchronous -40C to +125C Operating Temperature Range rectifiers. Thermal-Shutdown Protection The MAX15024/MAX15025 are available in 10-pin TDFN packages and are specified over the -40C to 1.95W Thermally Enhanced TDFN Power Packages +125C automotive temperature range. AEC-Q100 Qualified Applications Ordering Information Synchronous Rectifier Drivers Functional Diagrams Power-Supply Modules PART PIN-PACKAGE TOP MARK Switching Power Supply MAX15024AATB+T 10 TDFN-EP* ATX MAX15024AATB/V+T 10 TDFN-EP* AWT Pin Configurations MAX15024BATB+T 10 TDFN-EP* ATY TOP VIEW MAX15025AATB+T 10 TDFN-EP* ATZ MAX15025AATB/V+T 10 TDFN-EP* AYE MAX15025BATB+T 10 TDFN-EP* AUA 10 9 87 6 MAX15025CATB+T 10 TDFN-EP* AUB MAX15025DATB+T 10 TDFN-EP* AUC Note: All devices are specified over the -40C to +125C operating temperature range. MAX15024 +Denotes a lead(Pb)-free/RoHS-compliant package. /V = denotes an automotive qualified part. EP* *EP = Exposed pad. T = Tape and reel. 12534 See the Selector Guide at the end of the data sheet. Pin Configurations appear at end of data sheet. TDFN *EP = EXPOSED PAD. Functional Diagrams continued at end of data sheet. Pin Configurations continued at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. Block Diagrams appear at end of data sheet. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim integrated.com. 19-1053 Rev 3 4/11 AVAILABLE FB/SET REG V DRV CC GND P OUT IN+ N OUT IN- PGNDMAX15024/MAX15025 Single/Dual, 16ns, High Sink/Source Current Gate Drivers ABSOLUTE MAXIMUM RATINGS V to GND............................................................-0.3V to +30V Continuous Power Dissipation (T = +70C) CC A REG to GND..............-0.3V to the lower of +22V or (V + 0.3V) 10-Pin TDFN, Single-Layer Board CC DRV to PGND .........................................................-0.3V to +22V (derate 18.5mW/C above +70C)...........................1481.5mW IN ..........................................................................-0.3V to +22V 10-Pin TDFN, Multilayer Board FB/SET to GND.........................................................-0.3V to +6V (derate 24.4mW/C above +70C)...........................1951.2mW P OUT to DRV........................................................-22V to +0.3V Operating Temperature Range .........................-40C to +125C N OUT to PGND.....................................................-0.3V to +22V Junction Temperature......................................................+150C OUT1, OUT2 to PGND..............................-0.3V to (V + 0.3V) Storage Temperature Range .............................-65C to +150C DRV PGND to GND .......................................................-0.3V to +0.3V Lead Temperature (soldering, 10s) .................................+300C P OUT, N OUT Continuous Source/Sink Current* .......... 200mA Soldering Temperature (reflow) .......................................+260C OUT1, OUT2 Continuous Source/Sink Current*................200mA *Continuous output current is limited by the power dissipation of the package. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) 10 TDFN Junction-to-Ambient Thermal Resistance ( )...............41C/W JA Junction-to-Case Thermal Resistance ( )......................9C/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to