Evaluates: MAX17521 in 3.3V and 5V MAX17521 Evaluation Kit Output-Voltage Application General Description Quick Start The MAX17521 evaluation kit (EV kit) provides a proven Recommended Equipment design to evaluate the MAX17521 dual high-efficiency, MAX17521 EV kit high-voltage, synchronous step-down DC-DC converter. 7V to 60V, 2A DC input power supply The EV kit generates 3.3V and 5V output voltages at load currents up to 1A from a 7V to 60V input supply. The Two loads capable of sinking 1A EV kit features a switching-frequency selector pin and Two digital voltmeters (DVM) individual mode-of-operation selector pins, enable/under- voltage-lockout (EN/UVLO) pins, programmable soft-start Procedure pins, and open-drain RESET signals for each output. The EV kit is fully assembled and tested. Follow the steps below to verify the board operation. Caution: Do not turn Features on the power supply until all connections are completed. Operates from a 7V to 60V Input Supply 1) Set the power supply at a voltage between 7V and Dual-Output Voltage: 3.3V and 5V 60V. Disable the power supply. 2) Connect the positive terminal of the power supply to Up to 1A Output Current the VIN PCB pad and the negative terminal to the Pin-Selectable Switching Frequency nearest PGND1 PCB pad. Connect the positive ter- Enable/UVLO Input, Resistor-Programmable UVLO minal of one of the 1A loads to the VOUT1 PCB pad Threshold and the negative terminal to the PGND1 PCB pad. Connect the positive terminal of the other 1A load to Mode-Selection Pin for Each Output to Select the VOUT2 PCB pad and the negative terminal to the Between PWM and PFM Modes PGND2 PCB pad. Adjustable Soft-Start Time for Each Output 3) Connect the DVMs across the VOUT1 PCB pad and Open-Drain RESET Signals for Each Output the PGND1 PCB pad and across the VOUT2 PCB pad and the PGND2 PCB pad. External Frequency Synchronization 4) Verify that shunts are installed across pins 1-2 on Overcurrent and Overtemperature Protection jumpers J1, J2, and J3. Proven PCB Layout 5) Select the shunt position on J5 and J6 depending on the intended mode of operation. Fully Assembled and Tested 6) Turn on the DC power supply. 7) Enable the loads. 8) Verify that the DVMs display 3.3V and 5V. Ordering Information appears at end of data sheet. 19-7652 Rev 1 7/17Evaluates: MAX17521 in 3.3V and 5V MAX17521 Evaluation Kit Output-Voltage Application Regulator Enable/Undervoltage-Lockout Level Detailed Description (EN/UVLO1, EN/UVLO2) The MAX17521 EV kit provides a proven design to evaluate The device offers an adjustable input undervoltage- the MAX17521 high-efficiency, high-voltage, dual synchronous lockout level for each output. Set the voltage at which step-down DC-DC converter. The EV kit generates 3.3V and each converter turns on with a resistive voltage-divider 5V, at load currents up to 1A, from a 7V to 60V input supply. connected from VIN to SGND (viewable here). Connect The EV kit features a switching-frequency selector pin the center node of the divider to EN/UVLO pin. and individual mode-of-operation selector pins, enable/ Choose R to be 3.3M, and then calculate R undervoltage-lockout (EN/UVLO) pins, programmable TOP BOTTOM as: soft-start pins, and open-drain RESET signals for each output. R 1.218 TOP R = BOTTOM Soft-Start Input (SS) V 1.218 INU The device implements adjustable soft-start operation to Where V is the input voltage at which a particular INU reduce inrush current. Capacitors connected from the SS pins converter is required to turn on. Install a shunt across pins to SGND programs the soft-start time for the corresponding 1-2 on J1 and J2 to enable the EV kits outputs. See Table 1 output voltage. The selected output capacitance (C ) and SEL and Table 2 for proper jumper settings. the output voltage (V ) determine the minimum required OUT soft-start capacitor as follows: -6 C 56 x 10 x C x V SS SEL OUT The soft-start time (t ) is related to the capacitor SS connected at SS (C ) by the following equation: SS t = C /(5.55 x 10-6) SS SS For example, to program a 1ms soft-start time, a 5.6nF capacitor should be connected from the SS pin to SGND. Table 1. Regulator Enable (EN/UVLO1) Table 2. Regulator Enable (EN/UVLO2) Description (J1) Description (J2) SHUNT SHUNT EN/UVLO1 PIN MAX17521 OUTPUT1 EN/UVLO2 PIN MAX17521 OUTPUT2 POSITION POSITION 1-2* Connected to VIN1 Enabled 1-2* Connected to VIN2 Enabled Connected to the center Enabled, UVLO level set Connected to the center Enabled, UVLO level set Not Not node of resistor-divider through the R3 and R4 node of resistor-divider through the R11 and R12 installed installed R3 and R4 resistors R11 and R12 resistors 2-3 Connected to SGND Disabled 2-3 Connected to SGND Disabled *Default position. *Default position. Maxim Integrated 2 www.maximintegrated.com