EVALUATION KIT AVAILABLE MAX19713 10-Bit, 45Msps, Full-Duplex Analog Front-End General Description Features The MAX19713 is an ultra-low-power, highly integrated Dual 10-Bit, 45Msps Rx ADC and Dual 10-Bit, mixed-signal analog front-end (AFE) ideal for wideband 45Msps Tx DAC communication applications operating in full-duplex (FD) Ultra-Low Power mode. Optimized for high dynamic performance and ultra- 91.8mW at f = 45MHz, FD Mode CLK low power, the device integrates a dual 10-bit, 45Msps 79.2mW at f = 45MHz, Slow Rx Mode CLK receive (Rx) ADC dual 10-bit, 45Msps transmit (Tx) DAC 49.5mW at f = 45MHz, Slow Tx Mode CLK three fast-settling 12-bit aux-DAC channels for ancillary Low-Current Standby and Shutdown Modes RF front-end control and a 10-bit, 333ksps housekeep- Programmable Tx DAC Common-Mode DC Level ing aux-ADC. The typical operating power in FD mode is and I/Q Offset Trim 91.8mW at a 45MHz clock frequency. Excellent Dynamic Performance The Rx ADCs feature 54dB SINAD and 72.2dBc SFDR at SNR = 54.1dB at f = 5.5MHz (Rx ADC) IN 5.5MHz input frequency with a 45MHz clock frequency. SFDR = 70.3dBc at f = 2.2MHz (Tx DAC) OUT The analog I/Q input amplifiers are fully differential and accept 1.024V full-scale signals. Typical I/Q channel Three 12-Bit, 1s Aux-DACs P-P matching is 0.03 phase and 0.02dB gain. 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and Data Averaging The Tx DACs feature 70.3dBc SFDR at f = 2.2MHz OUT and f = 45MHz. The analog I/Q full-scale output volt- CLK Excellent Gain/Phase Match age range is 400mV differential. The output DC com- 0.03 Phase, 0.02dB Gain (Rx ADC) at mon-mode voltage is selectable from 0.71V to 1.06V. The f = 5.5MHz IN I/Q channel offset is adjustable to optimize radio lineup Multiplexed Parallel Digital I/O sideband/carrier suppression. Typical I/Q channel match- Serial-Interface Control ing is 0.01dB gain and 0.05 phase. Versatile Power-Control Circuits Two independent 10-bit parallel, high-speed digital buses Shutdown, Standby, Idle, Tx/Rx Disable used by the Rx ADC and Tx DAC allow full-duplex opera- tion for frequency-division duplex applications. The Rx Miniature 56-Pin TQFN Package ADC and Tx DAC can be disabled independently to opti- (7mm x 7mm x 0.8mm) mize power management. A 3-wire serial interface con- trols power-management modes, the aux-DAC channels, Pin Configuration and the aux-ADC channels. TOP VIEW The MAX19713 operates on a single 2.7V to 3.3V analog supply and 1.8V to 3.3V digital I/O supply. The MAX19713 42 41 40 39 38 37 36 35 34 33 32 31 30 29 is specified for the extended (-40C to +85C) tempera- ADC1 43 28 DA3 ture range and is available in a 56-pin, TQFN package. 27 DAC3 44 DA2 DAC2 45 26 DA1 The Selector Guide at the end of the data sheet lists other DAC1 25 DA0 46 pin-compatible versions in this AFE family. For time-divi- V 47 24 OV DD DD sion duplex (TDD) applications, refer to the MAX19705 IDN 48 23 OGND MAX19708 AFE family of products. 22 IDP 49 AD9 MAX19713 GND 50 21 AD8 Applications V 51 20 AD7 DD QDN 52 19 AD6 WiMAX CPEs Portable Communication QDP 53 18 AD5 801.11a/b/g WLAN Equipment 17 REFIN 54 AD4 EXPOSED PADDLE (GND) VoIP Terminals COM 55 16 AD3 REFN 56 15 AD2 Ordering Information 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PART* PIN-PACKAGE PKG CODE TQFN MAX19713ETN 56 TQFN-EP** T5677-1 NOTE: THE PIN 1 INDICATOR IS + FOR LEAD-FREE DEVICES. MAX19713ETN+ 56 TQFN-EP** T5677-1 *All devices are specified over the -40C to +85C operating range. Functional Diagram and Functional Diagram appear at end **EP = Exposed paddle. +Denotes lead-free package. of data sheet. 19-0529 Rev 1 9/06 REFP ADC2 V V DD DD IAP GND IAN V DD GND CS/WAKE CLK SCLK GND DIN VDD DOUT QAN DA9 QAP DA8 V DA7 DD GND DA6 AD0 DA5 AD1 DA4MAX19713 10-Bit, 45Msps, Full-Duplex Analog Front-End Absolute Maximum Ratings V to GND, OV to OGND .............................-0.3V to +3.6V Continuous Power Dissipation (T = +70C) DD DD A GND to OGND ......................................................-0.3V to +0.3V 56-Pin TQFN-EP (derate 27.8mW/C above +70C) ........2.22W IAP, IAN, QAP, QAN, IDP, IDN, QDP, Thermal Resistance ..................................................36C/W JA QDN, DAC1, DAC2, DAC3 to GND ................... -0.3V to V Operating Temperature Range ........................... -40C to +85C DD ADC1, ADC2 to GND ............................... -0.3V to (V + 0.3V) Junction Temperature ......................................................+150C DD REFP, REFN, REFIN, COM to GND ........ -0.3V to (V + 0.3V) Storage Temperature Range ............................ -60C to +150C DD AD0AD9, DA0DA9, SCLK, DIN, CS/WAKE, Lead Temperature (soldering, 10s) .................................+300C CLK, DOUT to OGND ....................... -0.3V to (OV + 0.3V) DD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (V = 3V, OV = 1.8V, internal reference (1.024V), C 10pF on all digital outputs, f = 45MHz (50% duty cycle), Rx ADC input amplitude DD DD L CLK = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output, C = C = REFP REFN C = 0.33F, C < 5pF on all aux-DAC outputs, T = T to T , unless otherwise noted. Typical values are at T = +25C.) (Note 1) COM L A MIN MAX A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER REQUIREMENTS Analog Supply Voltage V 2.7 3.0 3.3 V DD Output Supply Voltage OV 1.8 V V DD DD FD mode: f = 45MHz, f = 2.2MHz CLK OUT on both DAC channels 31.9 37 f = 5.5MHz on both ADC channels aux- IN DACs ON and at midscale, aux-ADC ON SPI2-Tx mode: f = 45MHz, f = CLK OUT 2.2MHz on both DAC channels Rx ADC 16.7 19 OFF aux-DACs ON and at midscale, aux-ADC ON SPI1-Rx mode: f = 45MHz, f = CLK IN 5.5MHz on both ADC channels Tx DAC 27.6 32 OFF (Tx DAC outputs at 0V) aux-DACs ON and at midscale, aux-ADC ON V Supply Current mA DD SPI4-Tx mode: f = 45MHz, f = CLK OUT 2.2MHz on both DAC channels Rx ADC 31.0 36 ON (output three-stated) aux-DACs ON and at midscale, aux-ADC ON SPI3-Rx mode: f = 45MHz, f = CLK IN 5.5MHz on both channels Tx DAC ON 30.2 35 (Tx DAC outputs at midscale) aux-DACs ON and at midscale, aux-ADC ON Standby mode: CLK = 0 or OV DD aux-DACs ON and at midscale, 3.3 5 aux-ADC ON Maxim Integrated 2 www.maximintegrated.com