Click here to ask about the production status of specific part numbers. MAX32650MAX32652 Ultra-Low-Power Arm Cortex-M4 Processor with FPU-Based Microcontroller (MCU) with 3MB Flash and 1MB SRAM General Description Benefits and Features DARWIN is a new breed of low-power microcontrollers Ultra-Efficient Microcontroller for Battery-Powered built to thrive in the rapidly evolving Internet of Things Applications (IoT). They are smart, with the biggest memories in their 120MHz Arm Cortex-M4 Processor with FPU class and a massively scalable memory architecture. They SmartDMA Provides Background Memory run forever, thanks to wearable-grade power technology. Transfers with Programmable Data Processing They are also tough enough to withstand the most ad- 120MHz High-Speed and 50MHz Low-Power vanced cyberattacks. DARWIN microcontrollers are de- Oscillators signed to run any application you can imaginein places 7.3728MHz Low-Power Oscillators where you wouldnt dream of sending other microcon- 32.768kHz and RTC Clock (Requires External trollers. Crystal) 8kHz, Always-On, Ultra-Low-Power Oscillator Generation UP microcontrollers are designed to handle 3MB Internal Flash, 1MB Internal SRAM the increasingly complex applications demanded by to- 104W/MHz Executing from Cache at 1.1V days advanced battery-powered devices and wireless Five Low-Power Modes: Active, Sleep, Background, sensors. The MAX32650MAX32652 are ultra-low-power Deep Sleep, and Backup memory-scalable microcontrollers designed specifically 1.8V and 3.3V I/O with No Level Translators for high-performance, battery-powered applications. They are based on an Arm Cortex -M4 with FPU CPU with Scalable Cached External Memory Interfaces: 3MB flash and 1MB SRAM. Memory scalability is support- 120MB/s HyperBus/Xccela DDR Interface ed with multiple memory-expansion interfaces, including a SPIXF/SPIXR for External Flash/RAM Expansion HyperBus/Xccela DDR interface and two SPI execute 240Mbps SDHC/eMMC/SDIO/microSD Interface in place (SPIx) interfaces. A secure digital interface sup- Optimal Peripheral Mix Provides Platform Scalability ports external high-speed memory cards, including SD, 16-Channel DMA SDIO, MMC, SDHC, and microSD. Three SPI Master (60MHz)/Slave (48MHz) Power-management features provide five low-power One QuadSPI Master (60MHz)/Slave (48MHz) modes for clock, peripheral, and voltage control. Individual Up to Three 4Mbaud UARTs with Flow Control 2 SRAM banks of 32KB, 96KB, or 1024KB (full retention) Two 1MHz I C Master/Slave 2 can be retained with reduced power consumption. A I S Slave SmartDMA performs complex background processing Four-Channel, 7.8ksps, 10-Bit Delta-Sigma ADC while the CPU is off to dramatically reduce overall power USB 2.0 Hi-Speed Device Interface with PHY consumption. 16 Pulse Train Generators Six 32-Bit Timers with 8mA High Drive The MAX32651 is a secure version with a trust protection 1-Wire Master unit (TPU) which provides a modular arithmetic accel- erator (MAA) for fast ECDSA, an AES engine, TRNG, Trust Protection Unit (TPU) for IP/Data Security SHA-256 hash, and secure bootloader. A memory decryp- Modular Arithmetic Accelerator (MAA), True tion integrity unit (MDIU) provides on-the-fly data decryp- Random Number Generator (TRNG) tion (plain or executable) stored in external flash. Secure Nonvolatile Key Storage, SHA-256, AES-128/192/256 The MAX32652 is packaged in a high-density, 0.35mm Memory Decryption Integrity Unit, Secure Boot pitch, 140-bump WLP targeted for tiny form factor prod- ROM ucts that require high I/O counts. Ordering Information appears at end of data sheet. Applications Sports Watches, Fitness Monitors Wearable Medical Patches, Portable Medical Devices Industrial Sensors, IoT 19-100220 Rev 7 10/20MAX32650MAX32652 Ultra-Low-Power Arm Cortex-M4 Processor with FPU-Based Microcontroller (MCU) with 3MB Flash and 1MB SRAM Simplified Block Diagram MAX32650/MAX32651/MAX32652MAX32650/MAX32651/MAX32652 120MHz 50MHz SECURE DIGITAL INTERFACE HOST 7.3728MHz Arm Cortex M4 8-BYTE 2 2 x I C MASTER/ WITH FPU CPU 32.768kHz TX/RX SLAVE FIFOS 8kHz NVIC 32-BYTE TX/RX 3 x 4-WIRE UART TCK/SWCLK JTAG SWD (SERIAL TMS/SWDIO FIFOS SHARED PAD WIRE DEBUG) TDO MEMORY FUNCTIONS 32-BYTE TDI 3 x SPI MASTER/ TX/RX FLASH SLAVE (4 CS) TIMERS/PWM FIFOS 3MB CAPTURE/ 32-BYTE COMPARE QSPI MASTER/ POR, RSTN TX/RX SDHC SLAVE (4 CS) BROWNOUT SRAM FIFOS HyperBus/ MONITOR, 1MB Xccela BUS SUPPLY VOLTAGE GPIO/ 16KB QSPI FLASH XIP 2 MONITORS SPECIAL I S CACHE MASTER 16KB CACHE FUNCTION SPI UP TO 105 QSPI 32-BYTE QSPI XIP 2 TX/RX I S SLAVE V DDIOH 2 I C FIFOS VDDIO UART VCORE VOLTAGE STANDARD DMA 1-Wire MASTER 1-Wire V REGULATION AND DDA LCD CONTROLLER POWER CONTROL V RTC 6 x 32-BIT TIMERS EXTERNAL V SS SMART DMA INTERRUPTS VSSA 16 PULSE TRAIN ENGINES 32KOUT 24-BIT LCD CONTROLLER RTC 32KIN QSPI SRAM XIP 2 WATCHDOG TIMER MASTER 16KB CRC-16/-32 CACHE HyperBus/Xcella DP USB 2.0 Hi- UNIQUE ID BUS HYP CLKN DM SPEED HYP CLK V DDB CONTROLLER AIN0 AIN1 TRUST PROTECTION UNIT (TPU) AIN2 (MAX32651 ONLY) AIN3 5 MODULAR ARITHMETIC ACCELERATOR (MAA) 10-BIT 5 TRUE RANDOM NUMBER GENERATOR (TRNG) - ADC V 4 DDB VDDA SECURE NV KEY VCORE SHA-256 2 V RTC 4 V AES-128, -192, -256 DDIO 4 V DDIOH SECURE BOOT ROM MEMORY DECRYPTION INTEGRITY UNIT (MDIU) www.maximintegrated.com Maxim Integrated 2 BUS MATRIX AHB, APB, IBUS, DBUS