MAX3750/MAX3751 19-4792 Rev 2 5/04 +3.3V, 2.125Gbps/1.0625Gbps Fibre Channel Port Bypass ICs General Description Features The MAX3750/MAX3751 are +3.3V, Fibre Channel port Single +3.3V Supply bypass ICs that include a high-speed multiplexer and Low Jitter: 10ps output buffer stage for hot swapping a storage device. Low Power Consumption These devices are optimized for use in a Fibre Channel 190mW (MAX3750) arbitrated loop topology. 180mW (MAX3751) The MAX3750 has a 2.125Gbps data rate, while the MAX3751s data rate is 1.0625Gbps. Total power con- Large Output Signal Swing: >1000mVp-p sumption (including output currents) is low: just 190mW Mismatch Tolerant Output Driver Stage for the MAX3750 and 180mW for the MAX3751. Low 150 Differential On-Chip Termination on All Inputs 10ps jitter makes these devices ideal for cascaded topologies. The output driver circuitry is tolerant of load 150 On-Chip Back Termination on All Output mismatches commonly caused by board vias and Ports inductive connectors. On-chip termination reduces external part count and simplifies board layout. Ordering Information PART TEMP RANGE PIN-PACKAGE Applications MAX3750CEE 0C to +70C 16 QSOP 2.125Gbps Fibre Channel Arbitrated Loop MAX3750CEE 0C to +70C 16 QSOP 1.0625Gbps Fibre Channel Arbitrated Loop MAX3751CEE 0C to +70C 16 QSOP Mass Storage Systems Denotes lead-free package. RAID/JBOD Applications Typical Application Circuit TX RX TX RX TX RX C3 C5 MAX3750 MAX3750 MAX3750 OUT+ IN+ OUT+ IN+ OUT+ IN+ OUT- IN- OUT- IN- OUT- IN- MAX3750 MAX3750 MAX3750 MAX3751 C4 MAX3751 C6 MAX3751 SEL V SEL V SEL V GND CC GND CC GND CC 3.3V 3.3V 3.3V MICROPROCESSOR C1C8 = 100nF THREE MAX3750/MAX3751s CASCADED IN AN FC-AL APPLICATION Pin Configuration appears at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE LIN+ LIN- FC-AL DISK DRIVE LOUT+ LOUT- C7 LIN+ C8 LIN- FC-AL C2 DISK DRIVE LOUT+ C1 LOUT- LIN+ LIN- FC-AL DISK DRIVE LOUT+ LOUT-+3.3V, 2.125Gbps/1.0625Gbps Fibre Channel Port Bypass ICs ABSOLUTE MAXIMUM RATINGS Supply Voltage, V ..............................................-0.5V to +5.0V Continuous Power Dissipation (T = +70C) CC A Voltage at LOUT+, LOUT-, 16 QSOP (derate 8.3mW/C above +70C).................667mW OUT+, OUT- ..............................(V - 1.65V) to (V + 0.5V) Operating Temperature Range ...........................-40C to +85C CC CC Current Out of LOUT+, LOUT-, OUT+, OUT- ...................22mA Storage Temperature Range ...............................-55C to 150C Voltage at SEL, LIN+, LIN-, IN+, IN- ..........-0.5V to (V + 0.5V) Lead Soldering Temperature (soldering, 10s).................+300C CC Differential Voltage at (LIN+ - LIN-), (IN+ - IN-).....................2V DC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, T = 0C to +70C, unless otherwise noted. Typical values are at V = +3.3V and T = +25C.) CC A CC A PARAMETER CONDITIONS MIN TYP MAX UNITS MAX3750 (Note 1) 57 84 Supply Current mA MAX3751 (Note 1) 54 78 Data Input Voltage Swing Total differential signal, peak-to-peak 200 2200 mV Differential Input Impedance 132 150 172 150 load, total differential signal, Output Voltage at LOUT and OUT 1000 1600 mV peak-to-peak TTL Input Current -10 10 A TTL Input Low -0.3 0.8 V TTL Input High 2V + 0.3 V CC Note 1: Output currents included. AC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, T = 0C to +70C, unless otherwise noted. Typical values are at V = +3.3V and T = +25C.) CC A CC A PARAMETER CONDITIONS MIN TYP MAX UNITS MAX3750 2.125 Data Rate Gbps MAX3751 1.0625 Data Input Voltage Swing Total differential signal, peak-to-peak 200 2200 mV MAX3750 160 Output Edge Speed ps IN OUT, IN LOUT MAX3751 325 MAX3750, peak-to-peak (Notes 2, 4) 10 Deterministic Jitter ps IN OUT, IN LOUT, LIN OUT MAX3751, peak-to-peak (Notes 3, 4) 10 MAX3750, RMS (Note 2) 1.6 Random Jitter ps IN OUT, IN LOUT, LIN OUT MAX3751, RMS (Note 3) 1.6 MAX3750 300 Prop Delay ps IN OUT, IN LOUT, LIN OUT MAX3751 442 Note 2: Input t and t < 150ps, 20% to 80%. R F Note 3: Input t and t < 300ps, 20% to 80%. R F Note 4: Deterministic jitter is measured with 20 bits of the k28.5 pattern (00111110101100000101). 2 MAX3750/MAX3751