EVALUATION KIT AVAILABLE MAX5073 2.2MHz, Dual-Output Buck or Boost Converter with Internal Power MOSFETs General Description Features 4.5V to 5.5V or 5.5V to 23V Input Supply The MAX5073 is a dual-output DC-DC converter with Voltage Range integrated high-side n-channel power MOSFETs. Each output can be configured either as a buck converter or a 0.8V (Buck) to 28V (Boost) Output Voltage boost converter. The device is capable of operating from Two Independent Output DC-DC Converters a wide 5.5V to 23V input voltage range. Each output is with Internal Power MOSFETs programmable down to 0.8V in the buck mode and up to Each Output can be Configured in Buck or Boost 28V in the boost mode with an output voltage accuracy Mode of 1%. In the buck mode, converter 1 and converter 2 I and I of 2A and 1A (Respectively) in OUT1 OUT2 can deliver 2A and 1A, respectively. The output switching Buck Mode frequency of each converter can be programmed from 180 Out-of-Phase Operation 200kHz to 2.2MHz to avoid harmonics in a radio power Clock Output for Four Phase Operation supply or to reduce the size of the power supply. Each Switching Frequency Programmable from 200kHz to output operates 180 out-of-phase thus reducing input- 2.2MHz capacitor ripple current, size, and cost. A SYNC input Digital Soft-Start and Sync Input facilitates external frequency synchronization. Moreover, Individual Converter Shutdown and Power-Good a CLKOUT output provides out-of-phase clock signal Output with respect to converter 2, allowing four-phase operation Short-Circuit Protection (Buck)/Maximum Duty-Cycle using two MAX5073 ICs in master-slave configuration. Limit (Boost) The MAX5073 includes an internal digital soft-start that reduc- Thermal Shutdown es inrush current, eliminates output-voltage overshoot, and Thermally Enhanced 28-Pin Thin QFN Package ensures monotonic rise in output voltage during power-up. Dissipates up to 2.7W at +70C The device includes individual shutdown and a power-good output for each converter. Protection features include output Pin Configuration short-circuit protection for buck mode and maximum duty- cycle limit for boost operation, as well as thermal shutdown. The MAX5073 is available in a thermally enhanced 28-pin TOP VIEW thin QFN package that can dissipate 2.7W at +70C ambi- ent temperature. The device is rated for operation over the 21 20 19 18 17 16 15 -40C to +85C extended, or -40C to +125C automotive temperature range. PGOOD2 22 14 BYPASS Applications SOURCE1 23 13 VL Point-of-Load DC-DC Converters SOURCE1 24 12 VL Telecom Line Card SGND MAX5073 25 11 V+ Networking Line Card Power-Over-Ethernet Postregulation for PDs 26 10 PGND OSC Ordering Information 27 9 SOURCE2 N.C. PIN- PACKAGE SOURCE2 28 8 SYNC PART TEMP RANGE PACKAGE CODE 1 2 3 4 5 6 7 28 Thin QFN-EP* MAX5073ETI -40C to +125C T2855-6 (5mm x 5mm) 28 Thin QFN-EP* MAX5073ETI+ -40C to +125C T2855-6 (5mm x 5mm) THIN QFN *EP = Exposed pad. +Denotes lead-free package. Ordering Information continued at end of data sheet. 19-3504 Rev 3 5/14 CLKOUT PGOOD1 BST2/VDD2 BST1/VDD1 DRAIN2 DRAIN1 DRAIN2 DRAIN1 EN2 EN1 FB2 FB1 COMP2 COMP1MAX5073 2.2MHz, Dual-Output Buck or Boost Converter with Internal Power MOSFETs Absolute Maximum Ratings V+ to PGND ..........................................................-0.3V to +25V SOURCE2, DRAIN2 Peak Current ............................3A for 1ms SGND to PGND ....................................................-0.3V to +0.3V VL, BYPASS to SGND Short Circuit .........................Continuous VL to SGND .................-0.3V to the lower of +6V or (V+ + 0.3V) Continuous Power Dissipation (T = +70C) A BST1/VDD1, BST2/VDD2, DRAIN , PGOOD2, PGOOD1 to 28-Pin Thin QFN (derate 21.3mW/C above +70C) .. 2758mW* SGND ................................................................-0.3V to +30V Package Junction-to-Case Thermal Resistance ( ) ......2C/W JC BST1/VDD1 to SOURCE1, Operating Temperature Ranges: BST2/VDD2 to SOURCE2 .................................-0.3V to +6V MAX5073ETI (T to T ) ......................... -40C to +85C MIN MAX SOURCE to SGND..............................................-0.6V to +25V MAX5073ATI (T to T ) ....................... -40C to +125C MIN MAX EN to SGND ...........................................-0.3V to (VL to +0.3V) Junction Temperature ......................................................+150C CLKOUT, BYPASS, OSC, COMP1, Storage Temperature Range ............................ -65C to +150C COMP2, SYNC, FB to SGND................-0.3V to (VL + 0.3V) Lead Temperature (soldering, 10s) .................................+300C SOURCE1, DRAIN1 Peak Current ............................5A for 1ms *As per JEDEC51 standard. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (V+ = VL = 5.2V or V+ = 5.5V to 23V, EN = VL, SYNC = GND, I = 0mA, PGND = SGND, C = 0.22F, C = 4.7F (ceramic), VL BYPASS VL R = 10k (circuit of Figure 1), T = T = T to T , unless otherwise noted.) (Note 1) OSC A J MIN MAX PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SYSTEM SPECIFICATIONS (Note 2) 5.5 23.0 Input Voltage Range V+ V VL = V+ 4.5 5.5 VL unloaded, no switching, V = 1V, FB Operating Supply Current I 2.2 4 mA Q V+ = 12V, R = 60k OSC EN = 0, PGOOD floating, V+ = 12V, 0.6 1.2 R = 60k (MAX5073ETI) OSC I V+ Standby Supply Current STBY mA EN = 0, PGOOD floating, V+ = 12V, 0.6 1.4 R = 60k (MAX5073ATI) OSC V+ = VL = 5V 82 V = 3.3V at 1.5A, OUT1 Efficiency V = 2.5V at 0.75A V+ = 12V 80 % OUT2 (f = 1.25MHz) SW V+ = 16V 78 STARTUP/VL REGULATOR VL Undervoltage Lockout Trip UVLO VL falling 3.95 4.1 4.25 V Level VL Undervoltage Lockout 175 mV Hysteresis VL Output Voltage VL V+ = 5.5V to 23V, I = 0 to 40mA 4.9 5.2 5.5 V SOURCE BYPASS OUTPUT I = 0, R = 60k (MAX5073ETI) 1.98 2.00 2.02 BYPASS OSC BYPASS Voltage V V BYPASS I = 0, R = 60k (MAX5073ATI) 1.975 2.00 2.025 BYPASS OSC BYPASS Load Regulation V 0 I 50A, R = 60k 0 2 10 mV BYPASS BYPASS OSC SOFT-START f OSC Digital Ramp Period Internal 6-bit DAC 2048 clock cycles Steps Soft-Start Steps 64 Maxim Integrated 2 www.maximintegrated.com