EVALUATION KIT AVAILABLE MAX5318 18-Bit, High-Accuracy Voltage Output DAC with Digital Gain, Offset Control, and SPI Interface General Description Benefits and Features The MAX5318 is a high-accuracy, 18-bit, serial SPI input, S Ideal for ATE and High-Precision Instruments buffered voltage output digital-to-analog converter (DAC) INL Accuracy Guaranteed with 2 LSB (Max) in a 4.4mm x 7.8mm, 24-lead TSSOP package. The Over Temperature device features Q2 LSB INL (max) accuracy and a Q1 S Fast Settling Time (3s) with 10kI 100pF Load LSB DNL (max) accuracy over the full temperature range S Safe Power-Up-Reset to Zero or Midscale DAC of -40NC to +105NC. Output (Pin-Selectable) The DAC voltage output is buffered resulting in a fast Predetermined Output Device State in Power-Up settling time of 3Fs and a low offset and gain drift of and Reset in System Design Q0.5ppm/NC of FSR (typ). The force-sense output (OUT) S Negative Supply (AVSS) Option Allows Full INL maintains accuracy while driving loads with long lead and DNL Performance to 0V lengths. Additionally, a separate AVSS supply, allows the S SPI Interface Compatible with 1.8V to 5.5V Logic output amplifier to go to 0V (GND) while maintaining full linearity performance. S High Integration Reduces Development Time and PCB Area The MAX5318 includes user-programmable digital gain Buffered Voltage Output Directly Drives and offset correction to enable easy system calibration. 2kI Load Rail-to-Rail At power-up, the device resets its outputs to zero or mid- Integrated Reference Buffer scale. The wide 2.7V to 5.5V supply voltage range and No External Amplifiers Required integrated low-drift, low-noise reference buffer amplifier S Small 4.4mm x 7.8mm, 24-Pin TSSOP Package make for ease of use. The MAX5318 features a 50MHz 3-wire SPI interface. The MAX5318 is available in a 24-lead TSSOP package and Ordering Information and Typical Operating Circuit appear operates over the -40NC to +105NC temperature range. at end of data sheet. Applications Test and Measurement Programmable Voltage Functional Diagram Equipment and Current Sources Automatic Test Equipment Automatic Tuning and Calibration Gain and Offset V REF AVDD1 AVDD2 DDIO 24 18 14 21 Adjustment Communication Systems 17 REFO Data-Acquisition Systems Medical Imaging BUFFER MAX5318 Process Control and LDAC 5 Servo Loops CS 9 DIGITAL 7.8kI OFFSET SCLK 8 DIN 7 DIGITAL SPI SPI INTERFACE GAIN DOUT 6 7.8kI 7.8kI 16 RFB READY 2 INPUT/DAC 18-BIT DIN REGISTER DAC 15 OUT BUSY 4 OUTPUT For related parts and recommended products to use with this part, BUFFER RST 1 refer to www.maximintegrated.com/MAX5318.related. M/Z 3 POWER-ON CONTROL RESET LOGIC 7.8kI TC/SB 10 PD 11 SHUTDOWN 23 22 13 19 20 12 DGND BYPASS AGND AGND S AGND F AVSS For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com. 19-6465 Rev 0 9/12MAX5318 18-Bit, High-Accuracy Voltage Output DAC with Digital Gain, Offset Control, and SPI Interface ABSOLUTE MAXIMUM RATINGS AGND to DGND ...................................................-0.3V to +0.3V REF to AGND ...................-0.3V to the lower of V and +6V AVDD AGND F, AGND S to AGND ...............................-0.3V to +0.3V SCLK, DIN, CS, BUSY, LDAC, READY, AGND F, AGND S to DGND ...............................-0.3V to +0.3V M/Z, TC/SB, RST, PD, DOUT to DGND ....... -0.3V to the lower of AVDD to AGND .......................................................-0.3V to +6V (V + 0.3V) and +6V DDIO AVDD to REF ...........................................................-0.3V to +6V Continuous Power Dissipation (T = +70NC) A AVSS to AGND ........................................................-2V to +0.3V TSSOP (derate 13.9mW/NC above +70NC).............1111.1mW V to DGND .......................................................-0.3V to +6V Operating Temperature Range ........................ -40NC to +105NC DDIO BYPASS to DGND ....................................... -0.3V to the lower of Maximum Junction Temperature .....................................+150NC (V or V + 0.3V) and +4.5V Storage Temperature Range ............................ -65NC to +150NC AVDD DDIO OUT, REFO, RFB to AGND ......................... -0.3V to the lower of Lead Temperature (soldering, 10s) ................................+300NC (V + 0.3V) and +6V Soldering Temperature (reflow) ......................................+260NC AVDD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TSSOP Junction-to-Case Thermal Resistance (q ) ...............13C/W JA Junction-to-Ambient Thermal Resistance (q ) ..........72C/W JA Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (V = V = 4.5V to 5.5V, V = -1.25V, V = V = V = V = 0V, V = 4.096V, TC/SB = AVDD DDIO AVSS AGND DGND AGND F AGND S REF PD = LDAC = M/Z = DGND, RST = V , C = 100pF, C = 100pF, R = 10k, C = 1F, T = -40C to +105C, unless DDIO REFO L L BYPASS A otherwise noted. Typical values are at T = +25C.) (GAIN = 0x3FFFF and OFFSET = 0x00000.)(Note 2) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 18 Bits DIN = 0x00000 to 0x3FFFF (binary mode), DIN = 0x20000 to 0x1FFFF (twos complement mode) Integral Nonlinearity (Note 3) INL -2 Q0.5 +2 LSB DIN = 0x01900 to 0x3FFFF (binary mode), DIN = 0x21900 to 0x1FFFF (twos complement mode), V = 0V AVSS Differential Nonlinearity (Note 3) DNL -1 Q0.275 +1 LSB DIN = 0, T = +25NC -48 Q4 +48 A Zero Code Error OE LSB DIN = 0, T = -40NC to +105NC Q14 A Zero Code Error Drift (Note 4) DIN = 0 -1.6 Q0.10 +1.6 ppm/NC T = +25NC -16 Q1 +16 A Gain Error GE LSB T = -40NC to +105NC Q27 A Gain Error Temperature ppm/NC TCGE -2.5 Q0.10 +2.5 Coefficient (Note 4) of FSR V - AVDD Output Voltage Range No load 0 V 0.1 Maxim Integrated 2