MAX5703/MAX5704/MAX5705 Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output Voltage DACs with Internal Reference and SPI Interface General Description Benefits and Features The MAX5703/MAX5704/MAX5705 single-channel, low- S Single High-Accuracy DAC Channel power, 8-/10-/12-bit, voltage-output digital-to-analog 12-Bit Accuracy Without Adjustments converters (DACs) include output buffers and an internal 1 LSB INL Buffered Voltage Output reference that is selectable to be 2.048V, 2.500V, or Monotonic Over All Operating Conditions 4.096V. The MAX5703/MAX5704/MAX5705 accept a S Three Precision Selectable Internal References wide supply voltage range of 2.7V to 5.5V with extremely 2.048V, 2.500V, or 4.096V low power (< 1mW) consumption to accommodate most S Internal Output Buffer low-voltage applications. A precision external reference Rail-to-Rail Operation with External Reference input allows rail-to-rail operation and presents a 100kI 6.3s Settling Time (typ) load to an external reference. Output Directly Drives 2kI Loads The MAX5703/MAX5704/MAX5705 have a 50MHz, S Small, 10-Pin, 2mm x 3mm TDFN and 3mm x 5mm 3-wire SPI/QSPI/MICROWIRE/DSP-compatible serial MAX Packages interface. The DAC output is buffered and has a low S Wide 2.7V to 5.5V Supply Range supply current of 155FA (typical at 3V) and a low offset error of Q0.5mV (typical). On power-up, the MAX5703/ S Flexible 1.8V to 5.5V V DDIO MAX5704/MAX5705 reset the DAC outputs to zero, S 50MHz, 3-Wire, SPI/QSPI/MICROWIRE/DSP- providing additional safety for applications that drive Compatible Serial Interface valves or other transducers which need to be off on S Power-On-Reset to Zero-Scale DAC Output power-up. The internal reference is initially powered down to allow use of an external reference. S User-Configurable Asynchronous I/O Functions: CLR, LDAC, GATE The MAX5703/MAX5704/MAX5705 include a user- configurable active-low asynchronous input, AUX for S Three Software-Selectable Power-Down Output additional flexibility. This input can be programmed to Impedances: 1kI, 100kI, or High Impedance asynchronously clear (CLR) or temporarily gate (GATE) the S Low 155A DAC Supply Current at 3V DAC output to a user-programmable value. A dedicated active-low asynchronous LDAC input is also included. This Functional Diagram allows simultaneous output updates of multiple devices. The MAX5703/MAX5704/MAX5705 are available in 10-pin V V DDIO DD REF M TDFN/MAX packages and are specified over the -40NC to +125NC temperature range. MAX5703 INTERNAL REFERENCE/ MAX5704 EXTERNAL BUFFER MAX5705 Applications CS 8-/10-/ CODE DAC 12-BIT Programmable Voltage and Current Sources SCLK LATCH REGISTER DAC OUT BUFFER Gain and Offset Adjustment SPI DIN SERIAL INTERFACE Automatic Tuning and Optical Control AUX CLEAR / CLEAR / CODE LOAD GATE Power Amplifier Control and Biasing RESET RESET LDAC 100kI 1kI Process Control and Servo Loops POWER DAC CONTROL LOGIC DOWN POR Portable Instrumentation Data Acquisition GND QSPI is a trademark of Motorola, Inc. Ordering Information appears at end of data sheet. MICROWIRE is a registered trademark of National For related parts and recommended products to use with this part, Semiconductor Corp. refer to: www.maximintegated.com/MAX5703.related MAX is a registered trademark of Maxim Integrated Products, Inc. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com. 19-6463 Rev 3 11/14MAX5703/MAX5704/MAX5705 Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output Voltage DACs with Internal Reference and SPI Interface ABSOLUTE MAXIMUM RATINGS V to GND .............................................................-0.3V to +6V Maximum Continuous Current into Any Pin .................... 50mA DD V to GND .........................................................-0.3V to +6V Operating Temperature Range ........................ -40NC to +125NC DDIO OUT, REF to GND ........-0.3V to lower of (V + 0.3V) and +6V Storage Temperature Range ............................ -65NC to +150NC DD CS, SCLK, DIN, AUX, LDAC to GND ......................-0.3V to +6V Lead Temperature (soldering, 10s) ................................+300NC Continuous Power Dissipation (T = +70NC) Soldering Temperature (reflow) ......................................+260NC A TDFN (derate 14.9mW/NC above +70NC) ...............1188.7mW MAX (derate 8.8mW/NC above +70NC) ..................707.3mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TDFN Junction-to-Ambient Thermal Resistance ( ) .......67.3NC/W JA MAX Junction-to-Ambient Thermal Resistance ( ) .....113.1NC/W JA Junction-to-Ambient Thermal Resistance ( ) ...........36NC/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegated.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (V = 2.7V to 5.5V, V = 1.8V to 5.5V, V = 0V, C = 200pF, R = 2kI , T = -40NC to +125NC, unless otherwise noted.) DD DDIO GND L L A (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (Note 3) MAX5703 8 Resolution and Monotonicity N MAX5704 10 Bits MAX5705 12 MAX5703, 8 bits -0.25 0.05 +0.25 Integral Nonlinearity (Note 4) INL MAX5704, 10 bits -0.5 0.2 +0.5 LSB MAX5705, 12 bits -1 0. 5 +1 MAX5703, 8 bits -0.25 0.05 +0.25 Differential Nonlinearity (Note 4) DNL MAX5704, 10 bits -0.5 0.1 +0.5 LSB MAX5705, 12 bits -1 0.2 +1 Offset Error (Note 5) OE -5 0.5 +5 mV Offset Error Drift 10 FV/NC Gain Error (Note 5) GE -1.0 0.1 +1.0 %FS ppm of Gain Temperature Coefficient With respect to V 2.5 REF FS/NC Zero-Scale Error 0 +10 mV Full-Scale Error With respect to V -0.5 +0.5 %FS REF Maxim Integrated 2