MAX5723/MAX5724/ Ultra-Small, Octal-Channel, 8-/10-/12-Bit MAX5725 Buffered Output DACs with Internal Reference and SPI Interface General Description Benefits and Features Eight High-Accuracy DAC Channels The MAX5723/MAX5724/MAX5725 8-channel, low-power, 8-/10-/12-bit, voltage-output digital-to-analog converters 12-Bit Accuracy Without Adjustment 1 LSB INL Buffered Voltage Output (DACs) include output buffers and an internal 3ppm/C reference that is selectable to be 2.048V, 2.500V, or Guaranteed Monotonic Over All Operating Conditions 4.096V. The MAX5723/MAX5724/MAX5725 accept a Independent Mode Settings for Each DAC wide supply voltage range of 2.7V to 5.5V with extremely low power (6mW) consumption to accommodate most Three Precision Selectable Internal References low-voltage applications. A precision external reference 2.048V, 2.500V, or 4.096V input allows rail-to-rail operation and presents a 100kI Internal Output Buffer (typ) load to an external reference. Rail-to-Rail Operation with External Reference The MAX5723/MAX5724/MAX5725 have a fast 50MHz, 4.5s Settling Time 4-wire SPI/QSPI/MICROWIRE/DSP-compatible serial Outputs Directly Drive 2k Loads interface that operates at clock rates up to 50MHz. The Small 6.5mm x 4.4mm 20-Pin TSSOP or Ultra-Small DAC output is buffered and has a low supply current 2.5mm x 2.3mm 20-Bump WLP Package of less than 250FA per channel and a low offset error Wide 2.7V to 5.5V Supply Range of Q0.5mV (typ). On power-up, the MAX5723/MAX5724/ Separate 1.8V to 5.5V V Power-Supply Input MAX5725 reset the DAC outputs to zero or midscale DDIO based on the status of M/Z logic input, providing flex- Fast 50MHz 4-Wire SPI/QSPI/MICROWIRE/DSP- ibility for a variety of control applications. The internal Compatible Serial Interface reference is initially powered down to allow use of an Programmable Interface Watchdog Timer external reference. The MAX5723/MAX5724/MAX5725 Pin-Selectable Power-On-Reset to Zero-Scale or allow simultaneous output updates using software LOAD Midscale DAC Output commands or the hardware load DAC logic input (LDAC). LDAC and CLR for Asynchronous DAC Control The MAX5723/MAX5724/MAX5725 feature a program- Three Selectable Power-Down Output Impedances mable watchdog function which can be enabled to moni- 1k , 100k, or High Impedance tor the I/O interface for activity and integrity. A clear logic input (CLR) allows the contents of the CODE Functional Diagram and the DAC registers to be cleared asynchronously and simultaneously sets the DAC outputs to the program- V V REF DDIO DD mable default value. The MAX5723/MAX5724/MAX5725 MAX5723 are available in a 20-pin TSSOP and an ultra-small, MAX5724 INTERNAL REFERENCE/ MAX5725 EXTERNAL BUFFER 20-bump WLP package and are specified over the -40NC CSB to +125NC temperature range. SCLK 1 OF 8 DAC CHANNELS DIN SPI CODE DAC 8-/10-/12-BIT Applications REGISTER LATCH DAC SERIAL DOUT OUT0 INTERFACE BUFFER Programmable Voltage and Current Sources OUT1 CLR OUT2 LDAC Gain and Offset Adjustment (GATE/ OUT3 CLEAR/ CLEAR/ CODE RESET LOAD RESET) OUT4 Automatic Tuning and Optical Control 100kI 1kI OUT5 IRQ WATCHDOG TIMER POWER-DOWN OUT6 DAC CONTROL LOGIC Power Amplifier Control and Biasing OUT7 M/Z POR Process Control and Servo Loops Portable Instrumentation GND QSPI is a trademark of Motorola, Inc. Ordering Information appears at end of data sheet. MAX is a registered trademark of Maxim Integrated Products, Inc. 19-6243 Rev 2 2/13MAX5723/MAX5724/ Ultra-Small, Octal-Channel, 8-/10-/12-Bit MAX5725 Buffered Output DACs with Internal Reference and SPI Interface Absolute Maximum Ratings V V to GND ................................................-0.3V to +6V Maximum Continuous Current into Any Pin ....................Q50mA DD, DDIO OUT , REF to GND ......................................0.3V to the lower of Operating Temperature .................................... -40NC to +125NC (V + 0.3V) and +6V Storage Temperature ....................................... -65NC to +150NC DD Lead Temperature (TSSOP only) (soldering, 10s) ..........+300NC SCLK, CSB, IRQ, M/Z, LDAC, CLR to GND ...........-0.3V to +6V DIN, DOUT to GND .....................................-0.3V to the lower of Soldering Temperature (reflow) .................................... +260NC (V + 0.3V) and +6V DDIO Continuous Power Dissipation (T = +70NC) A TSSOP (derate at 13.6mW/NC above 70NC) ..............1084mW WLP (derate at 21.3mW/NC above 70NC) ..................1700mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 1) TSSOP WLP Junction-to-Ambient Thermal Resistance ( ) ......73.8NC/W Junction-to-Ambient Thermal Resistance ( ) JA JA Junction-to-Case Thermal Resistance ( ) ..............20NC/W (Note 2) ...................................................................47NC/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Note 2: Visit www.maximintegrated.com/app-notes/index.mvp/id/1891 for information about the thermal performance of WLP packaging. Electrical Characteristics (V = 2.7V to 5.5V, V = 1.8V to 5.5V, V = 0V, C = 200pF, R = 2kI, T = -40NC to +125NC, unless otherwise noted.) DD DDIO GND L L A (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (Note 4) MAX5723 8 Resolution and Monotonicity N MAX5724 10 Bits MAX5725 12 MAX5723 -0.25 Q0.05 +0.25 Integral Nonlinearity (Note 5) INL MAX5724 -0.5 Q0.2 +0.5 LSB MAX5725 -1 Q0.5 +1 MAX5723 -0.25 Q0.05 +0.25 MAX5724 -0.5 Q0.1 +0.5 Differential Nonlinearity (Note 5) DNL LSB MAX5725 -1 Q0.2 +1 Offset Error (Note 6) OE -5 Q0.5 +5 mV Offset Error Drift Q10 FV/NC Gain Error (Note 6) GE -1.0 Q0.1 +1.0 %FS ppm of Gain Temperature Coefficient With respect to V Q3.0 REF FS/NC Maxim Integrated 2 www.maximintegrated.com