MAX5803/MAX5804/MAX5805 Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output 2 Voltage DACs with Internal Reference and I C Interface General Description Benefits and Features The MAX5803/MAX5804/MAX5805 single-channel, low- S Single High-Accuracy DAC Channel power, 8-/10-/12-bit, voltage-output this is an addition 12-Bit Accuracy Without Adjustments to content digital-to-analog converters (DACs) include 1 LSB INL Buffered Voltage Output output buffers and an internal reference that is selectable Guaranteed Monotonic Over All Operating to be 2.048V, 2.500V, or 4.096V. The MAX5803/MAX5804/ Conditions MAX5805 accept a wide supply voltage range of 2.7V to S Three Precision Selectable Internal References 5.5V with extremely low power (< 1mW) consumption to 2.048V, 2.500V, or 4.096V accommodate most low-voltage applications. A precision S Internal Output Buffer external reference input allows rail-to-rail operation and Rail-to-Rail Operation with External Reference presents a 100kI (typ) load to an external reference. 6.3s Settling Time 2 The MAX5803/MAX5804/MAX5805 have an I C- Output Directly Drives 2kI Loads compatible, 2-wire interface that operates at clock rates S Small, 10-Pin, 2mm x 3mm TDFN and 3mm x 5mm up to 450kHz. The DAC output is buffered and has MAX Packages a low supply current of 155FA (typical at 3.5V) and a low offset error of Q0.5mV (typical). On power-up, the S Wide 2.7V to 5.5V Supply Range MAX5803/MAX5804/MAX5805 reset the DAC outputs 2 S Fast 400kHz I C-Compatible, 2-Wire Serial Interface to zero, providing additional safety for applications that with Readback Capability drive valves or other transducers which need to be off on S Power-On-Reset to Zero-Scale DAC Output power-up. S User-Configurable Asynchronous I/O Functions: The MAX5803/MAX5804/MAX5805 include a user- CLR, LDAC, GATE configurable active-low asynchronous input, AUX for S Three Software-Selectable Power-Down Output additional flexibility. This input can be programmed to Impedances: 1kI, 100kI, or High Impedance asynchronously clear (CLR) or temporarily gate (GATE) the DAC output to a user-programmable value. A dedicated S Low 155A DAC Supply Current at 3V active-low asynchronous LDAC input is also included. This allows simultaneous output updates of multiple devices. The MAX5803/MAX5804/MAX5805 are available in 10-pin Functional Diagram M TDFN/MAX packages and are specified over the -40NC to +125NC temperature range. V V DDIO DD REF Applications MAX5803 INTERNAL REFERENCE/ MAX5804 EXTERNAL BUFFER Programmable Voltage and Current Sources MAX5805 SCL Gain and Offset Adjustment 8-/10-/ CODE DAC SDA 12-BIT REGISTER LATCH Automatic Tuning and Optical Control DAC OUT BUFFER 2 I C ADDR Power Amplifier Control and Biasing SERIAL INTERFACE Process Control and Servo Loops AUX CLEAR / CLEAR / CODE LOAD GATE Portable Instrumentation RESET RESET LDAC 100kI 1kI POWER Data Acquisition DAC CONTROL LOGIC DOWN POPORR GND Ordering Information appears at end of data sheet. MAX is a registered trademark of Maxim Integrated Products, Inc. For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX5803.related For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com. 19-6464 Rev 3 11/14MAX5803/MAX5804/MAX5805 Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output 2 Voltage DACs with Internal Reference and I C Interface ABSOLUTE MAXIMUM RATINGS V to GND .............................................................-0.3V to +6V Maximum Continuous Current into Any Pin .................... 50mA DD V to GND .........................................................-0.3V to +6V Operating Temperature Range ........................ -40NC to +125NC DDIO OUT, REF to GND ........-0.3V to lower of (V + 0.3V) and +6V Storage Temperature Range ............................ -65NC to +150NC DD SCL, SDA, AUX, LDAC to GND ..............................-0.3V to +6V Lead Temperature (soldering, 10s) ................................+300NC ADDR to GND ...................................................-0.3V to lower of Soldering Temperature (reflow) ......................................+260NC (V + 0.3V) and +6V DDIO Continuous Power Dissipation (T = +70NC) A TDFN (derate 14.9mW/NC above +70NC) ...............1188.7mW MAX (derate 8.8mW/NC above +70NC) ..................707.3mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TDFN Junction-to-Ambient Thermal Resistance ( ) .......67.3NC/W JA MAX Junction-to-Ambient Thermal Resistance ( ) .....113.1NC/W JA Junction-to-Ambient Thermal Resistance ( ) ...........42NC/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (V = 2.7V to 5.5V, V = 1.8V to 5.5V, V = 0V, C = 200pF, R = 2kI , T = -40NC to +125NC, unless otherwise noted.) DD DDIO GND L L A (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (Note 3) MAX5803 8 Resolution and Monotonicity N MAX5804 10 Bits MAX5805 12 MAX5803, 8 bits -0.25 0.05 +0.25 Integral Nonlinearity (Note 4) INL MAX5804, 10 bits -0.5 0.2 +0.5 LSB MAX5805, 12 bits -1 0. 5 +1 MAX5803, 8 bits -0.25 0.05 +0.25 Differential Nonlinearity (Note 4) DNL MAX5804, 10 bits -0.5 0.1 +0.5 LSB MAX5805, 12 bits -1 0.2 +1 Offset Error (Note 5) OE -5 0.5 +5 mV Offset Error Drift 10 FV/NC Gain Error (Note 5) GE -1.0 0.1 +1.0 %FS ppm of Gain Temperature Coefficient With respect to V 2.5 REF FS/NC Zero-Scale Error 0 +10 mV Full-Scale Error With respect to V -0.5 +0.5 %FS REF Maxim Integrated 2