EVALUATION KIT AVAILABLE MAX5854 Dual, 10-Bit, 165Msps, Current-Output DAC General Description Features The MAX5854 dual, 10-bit, 165Msps digital-to-analog 10-Bit, 165Msps Dual DAC converter (DAC) provides superior dynamic performance Low Power in wideband communication systems. The device inte- 190mW with I = 20mA at f = 165MHz FS CLK grates two 10-bit DAC cores, and a 1.24V reference. The 2.7V to 3.6V Single Supply MAX5854 supports single-ended and differential modes Full Output Swing and Dynamic Performance at of operation. The dynamic performance is maintained over the entire 2.7V to 3.6V power-supply operating 2.7V Supply range. The analog outputs support a -1.0V to +1.25V Superior Dynamic Performance compliance voltage. 73dBc SFDR at f = 40MHz OUT The MAX5854 can operate in interleaved data mode to UMTS ACLR = 65.5dB at f = 30.7MHz OUT reduce the I/O pin count. This allows the converter to be Programmable Channel Gain Matching updated on a single, 10-bit bus. Integrated 1.24V Low-Noise Bandgap Reference The MAX5854 features digital control of channel gain Single-Resistor Gain Control matching to within 0.4dB in sixteen 0.05dB steps. Interleaved Data Mode Channel matching improves sideband suppression in analog quadrature modulation applications. The on-chip Single-Ended and Differential Clock Input Modes 1.24V bandgap reference includes a control amplifier that Miniature 40-Pin TQFN Package, 6mm x 6mm allows external full-scale adjustments of both channels EV Kit AvailableMAX5854 EV Kit through a single resistor. The internal reference can be disabled and an external reference can be applied for Ordering Information high-accuracy applications. PART TEMP RANGE PIN-PACKAGE The MAX5854 features full-scale current outputs of 2mA MAX5854ETL -40C to +85C 40 Thin QFN-EP* to 20mA and operates from a 2.7V to 3.6V single supply. The DAC supports three modes of power-control opera- *EP = Exposed paddle. tion: normal, low-power standby, and complete power- Pin Configuration down. In power-down mode, the operating current is reduced to 1A. TOP VIEW The MAX5854 is packaged in a 40-pin TQFN with exposed paddle (EP) and is specified for the extended 40 39 38 37 36 35 34 33 32 31 (-40C to +85C) temperature range. Pin-compatible, lower speed, and lower resolution ver- DA9/PD 1 30 CV DD EP sions are also available. Refer to the MAX5853 (10- DA8/DACEN 2 29 CGND bit, 80Msps), the MAX5852 (8-bit, 165Msps), and the 3 28 CLK DA7/IDE MAX5851 (8-bit, 80Msps) data sheets for more informa- DA6/REN 4 27 CV DD tion. See Table 4 at the end of the data sheet. DA5/G3 5 26 CLKXN MAX5854 DA4/G2 6 25 CLKXP Applications DA3/G1 7 24 DCE Communications DA2/G0 8 23 CW SatCom, LMDS, MMDS, HFC, DSL, WLAN, DA1 9 22 DB0 Point-to-Point Microwave Links 10 21 DA0 DB1 Wireless Base Stations 11 12 13 14 15 16 17 18 19 20 Quadrature Modulation Direct Digital Synthesis (DDS) Instrumentation/ATE TQFN 19-3197 Rev 0 2/04 DB9 AGND DB8 AV DD DB7 OUTPA DB6 OUTNA DB5 AGND DV OUTPB DD DGND OUTNB DB4 AV DD DB3 REFR DB2 REFOMAX5854 Dual, 10-Bit, 165Msps, Current-Output DAC Absolute Maximum Ratings AV , DV , CV to AGND, DGND, CGND .......-0.3V to +4V AGND to DGND, DGND to CGND, DD DD DD DA9DA0, DB9DB0, CW, DCE to AGND, AGND to CGND................................................-0.3V to +0.3V DGND, CGND .....................................................-0.3V to +4V Maximum Current into Any Pin CLKXN, CLKXP to CGND .......................................-0.3V to +4V (excluding power supplies) ...........................................50mA OUTP , OUTN to AGND ....................-1.25V to (AV + 0.3V) Continuous Power Dissipation (T = +70C) DD A CLK to DGND .........................................-0.3V to (DV + 0.3V) 40-Pin TQFN-EP (derate 23.3mW/C DD REFR, REFO to AGND ..........................-0.3V to (AV + 0.3V) above +70C) ..............................................................1.860W DD Operating Temperature Range ........................... -40C to +85C Storage Temperature Range ............................ -65C to +150C Junction Temperature ......................................................+150C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (AV = DV = CV = 3V, AGND = DGND = CGND = 0, f = 165Msps, differential clock, external reference, V = 1.2V, DD DD DD DAC REF I = 20mA, output amplitude = 0dB FS, differential output, T = T to T , unless otherwise noted. T +25C guaranteed by FS A MIN MAX A production test. T < +25C guaranteed by design and characterization. Typical values are at T = +25C.) A A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 10 Bits Integral Nonlinearity INL R = 0 -1.0 0.25 +1.0 LSB L Differential Nonlinearity DNL Guaranteed monotonic, R = 0 -0.5 0.2 +0.5 LSB L Offset Error V -0.5 0.1 +0.5 LSB OS Internal reference (Note1) -11.0 1.5 +6.8 Gain Error (See Also Gain Error GE %FSR Definition Section) External reference -6.25 0.7 +4.10 Internal reference 150 Gain-Error Temperature Drift ppm/C External reference 100 DYNAMIC PERFORMANCE f = 10MHz 69.4 78 OUT f = 165MHz, CLK f = 20MHz 77 OUT A = -1dBFS OUT f = 40MHz 73 OUT f = 10MHz 77 Spurious-Free Dynamic Range OUT SFDR dBc f = 100MHz, to Nyquist CLK f = 20MHz 77 OUT A = -1dBFS OUT f = 30MHz 76 OUT f = 25MHz, CLK f = 1MHz 79 OUT A = -1dBFS OUT f = 165MHz, f = 10MHz, CLK OUT 83 A = -1dBFS, span = 10MHz OUT Spurious-Free Dynamic Range f = 100MHz, f = 5MHz, CLK OUT SFDR 84 dBc Within a Window A = -1dBFS, span = 4MHz OUT f = 25MHz, f = 1MHz, CLK OUT 82 A = -1dBFS, span = 2MHz OUT 8 tones at 400kHz spacing, f = 78MHz, CLK Multitone Power Ratio to Nyquist MTPR 74 dBc f = 15MHz to 18.2MHz OUT Maxim Integrated 2 www.maximintegrated.com