MAX5883 19-2824 Rev 1 12/03 3.3V, 12-Bit, 200Msps High Dynamic Performance DAC with CMOS Inputs General Description Features The MAX5883 is an advanced, 12-bit, 200Msps digital- 200Msps Output Update Rate to-analog converter (DAC) designed to meet the Single 3.3V Supply Operation demanding performance requirements of signal synthe- sis applications found in wireless base stations and Excellent SFDR and IMD Performance other communications applications. Operating from a SFDR = 77dBc at f = 10MHz (to Nyquist) OUT single 3.3V supply, this DAC offers exceptional dynamic IMD = -86dBc at f = 10MHz OUT performance such as 77dBc spurious-free dynamic ACLR = 71dB at f = 30.72MHz OUT range (SFDR) at f = 10MHz. The DAC supports OUT 2mA to 20mA Full-Scale Output Current update rates of 200Msps at a power dissipation of less than 200mW. CMOS-Compatible Digital and Clock Inputs The MAX5883 utilizes a current-steering architecture, On-Chip 1.2V Bandgap Reference which supports a full-scale output current range of 2mA to 20mA, and allows a differential output voltage swing Low Power Dissipation between 0.1V and 1V . P-P P-P 48-Pin QFN-EP Package The MAX5883 features an integrated 1.2V bandgap reference and control amplifier to ensure high accuracy and low noise performance. Additionally, a separate reference input pin enables the user to apply an exter- nal reference source for optimum flexibility and to Ordering Information improve gain accuracy. PART TEMP RANGE PIN-PACKAGE The digital and clock inputs of the MAX5883 are MAX5883EGM -40C to +85C 48 QFN-EP* designed for CMOS-compatible voltage levels. The MAX5883 is available in a 48-pin QFN package with an *EP = Exposed paddle. exposed paddle (EP) and is specified for the extended industrial temperature range (-40C to +85C). Refer to the MAX5884 and MAX5885 data sheets for Pin Configuration pin-compatible 14- and 16-bit versions of the MAX5883. For LVDS high-speed versions, refer to the MAX5886, MAX5887, and MAX5888 data sheets. TOP VIEW Applications 1 36 N.C. B8 Base Stations: Single/Multicarrier UMTS, 2 35 B9 N.C. CDMA XOR 3 34 B10 4 33 Communications: LMDS, MMDS, Point-to-Point VCLK B11 5 32 CLKGND DGND Microwave CLKP 6 31 DV DD Digital Signal Synthesis CLKN 7 30 SEL0 MAX5883 Automated Test Equipment (ATE) 8 29 N.C. CLKGND VCLK 9 28 N.C. Instrumentation PD 10 27 N.C. 26 N.C. AV 11 DD 12 25 N.C. AGND QFN Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. REFIO 13 48 N.C. 14 FSADJ 47 N.C. DACREF 15 46 B0 N.C. 16 45 B1 AGND 17 44 B2 18 43 IOUTN DV DD IOUTP 19 42 DGND 20 41 B3 AGND AV 21 40 B4 DD 22 39 AGND B5 23 38 B6 AV DD AGND 24 37 B73.3V, 12-Bit, 200Msps High Dynamic Performance DAC with CMOS Inputs ABSOLUTE MAXIMUM RATINGS AV , DV , VCLK to AGND................................-0.3V to +3.9V Continuous Power Dissipation (T = +70C) DD DD A AV , DV , VCLK to DGND ...............................-0.3V to +3.9V 48-Pin QFN (derate 27mW/C above +70C)............2162.2mW DD DD AV , DV , VCLK to CLKGND ...........................-0.3V to +3.9V Thermal Resistance ( ) ..............................................+37C/W DD DD JA AGND, CLKGND to DGND....................................-0.3V to +0.3V Operating Temperature Range ..........................-40C to +85C DACREF, REFIO, FSADJ to AGND.............-0.3V to AV + 0.3V Junction Temperature .....................................................+150C DD IOUTP, IOUTN to AGND................................-1V to AV + 0.3V Storage Temperature Range ............................-60C to +150C DD CLKP, CLKN to CLKGND...........................-0.3V to VCLK + 0.3V Lead Temperature (soldering, 10s) ................................+300C B0B11, SEL0, PD, XOR to DGND.............-0.3V to DV + 0.3V DD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AV = DV = VCLK = 3.3V, AGND = DGND = CLKGND = 0V, external reference, V = 1.25V, R = 50 , I = 20mA, f = DD DD REFIO L OUT CLK 200Msps, T = T to T , unless otherwise noted. +25C guaranteed by production test, <+25C guaranteed by design and A MIN MAX characterization. Typical values are at T = +25C.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution 12 Bits Integral Nonlinearity INL Measured differentially 0.3 LSB Differential Nonlinearity DNL Measured differentially 0.2 LSB Offset Error OS -0.025 0.003 +0.025 %FS Offset Drift 50 ppm/C Full-Scale Gain Error GE External reference, T +25C -3.5 +1.3 %FS FS A Internal reference 100 Gain Drift ppm/C External reference 50 Full-Scale Output Current I (Note 1) 2 20 mA OUT Min Output Voltage Single ended -0.5 V Max Output Voltage Single ended 1.1 V Output Resistance R 1M OUT Output Capacitance C 5pF OUT DYNAMIC PERFORMANCE Output Update Rate f 1 200 Msps CLK f = 100MHz f = 16MHz, -12dB FS -150 CLK OUT dB FS/ Noise Spectral Density Hz f = 200MHz f = 80MHz, -12dB FS -148 CLK OUT f = 1MHz, 0dB FS 87 OUT Spurious-Free Dynamic Range to SFDR f = 100MHz f = 1MHz, -6dB FS 81 dBc CLK OUT Nyquist f = 1MHz, -12dB FS 80 OUT 2 MAX5883