MAX5886 19-2776 Rev 2 12/03 3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs General Description Features The MAX5886 is an advanced, 12-bit, 500Msps digital- 500Msps Output Update Rate to-analog converter (DAC) designed to meet the Single 3.3V Supply Operation demanding performance requirements of signal synthe- sis applications found in wireless base stations and Excellent SFDR and IMD Performance other communications applications. Operating from a SFDR = 76dBc at f = 30MHz (to Nyquist) OUT single 3.3V supply, this DAC offers exceptional dyna- IMD = -85dBc at f = 10MHz OUT mic performance such as 76dBc spurious-free dynamic ACLR = 70dB at f = 61MHz OUT range (SFDR) at f = 30MHz. The DAC supports OUT update rates of 500Msps and a power dissipation of 2mA to 20mA Full-Scale Output Current only 230mW. Differential, LVDS-Compatible Digital and Clock The MAX5886 utilizes a current-steering architecture, Inputs which supports a full-scale output current range of 2mA On-Chip 1.2V Bandgap Reference to 20mA, and allows a differential output voltage swing between 0.1V and 1V . P-P P-P Low 130mW Power Dissipation The MAX5886 features an integrated 1.2V bandgap ref- 68-Pin QFN-EP Package erence and control amplifier to ensure high accuracy and low noise performance. Additionally, a separate reference input pin enables the user to apply an exter- nal reference source for optimum flexibility and to Ordering Information improve gain accuracy. PART TEMP RANGE PIN-PACKAGE The digital and clock inputs of the MAX5886 are MAX5886EGK -40C to +85C 68 QFN-EP* designed for differential low-voltage differential signal (LVDS)-compatible voltage levels. The MAX5886 is *EP = Exposed paddle. available in a 68-pin QFN package with an exposed paddle (EP) and is specified for the extended industrial temperature range (-40C to +85C). Pin Configuration Refer to the MAX5887 and MAX5888 data sheets for pin-compatible 14- and 16-bit versions of the MAX5886. TOP VIEW 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 Applications EP N.C. 1 51 B7N Base Stations: Single/Multicarrier UMTS, N.C. 2 50 B7P N.C. 3 49 B8N CDMA, GSM N.C. 4 48 B8P Communications: LMDS, MMDS, Point-to-Point N.C. 5 47 B9N Microwave N.C. 6 46 B9P N.C. 7 45 B10N Digital Signal Synthesis N.C. 8 44 B10P MAX5886 DGND 9 43 B11N Automated Test Equipment (ATE) DV 10 42 B11P DD Instrumentation VCLK 11 41 DGND CLKGND 12 40 DV DD CLKP 13 39 SEL0 CLKN 14 38 N.C. CLKGND 15 37 N.C. VCLK 16 36 N.C. PD 17 35 N.C. 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 QFN Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE AV B0N DD AGND B0P B1N REFIO FSADJ B1P DACREF B2N N.C. B2P AV DD DGND AGND DV DD IOUTN DGND IOUTP B3N AGND B3P AV DD B4N AV B4P DD AGND B5N AV DD B5P AGND B6N N.C. B6P3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs ABSOLUTE MAXIMUM RATINGS AV , DV , VCLK to AGND................................-0.3V to +3.9V Continuous Power Dissipation (T = +70C) DD DD A AV , DV , VCLK to DGND ...............................-0.3V to +3.9V 68-Pin QFN-EP (derate 41.7mW/C above +70C) ......3333mW DD DD AV , DV , VCLK to CLKGND ...........................-0.3V to +3.9V Thermal Resistance ( ) ..............................................+24C/W DD DD JA AGND, CLKGND to DGND....................................-0.3V to +0.3V Operating Temperature Range ..........................-40C to +85C DACREF, REFIO, FSADJ to AGND.............-0.3V to AV + 0.3V Junction Temperature .....................................................+150C DD IOUTP, IOUTN to AGND................................-1V to AV + 0.3V Storage Temperature Range ............................-60C to +150C DD CLKP, CLKN to CLKGND...........................-0.3V to VCLK + 0.3V Lead Temperature (soldering, 10s) ................................+300C B0P/B0NB11P/B11N, SEL0, PD to DGND...........................................-0.3V to DV + 0.3V DD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AV = DV = VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V = 1.25V, differential transformer-coupled DD DD REFIO analog output, 50 double terminated (Figure 7), I = 20mA, T = T to T , unless otherwise noted. +25C guaranteed by OUT A MIN MAX production test, <+25C guaranteed by design and characterization. Typical values are at T = +25C.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution 12 Bits Integral Nonlinearity INL Measured differentially 0.2 LSB Differential Nonlinearity DNL Measured differentially 0.15 LSB Offset Error OS -0.025 0.01 +0.025 %FS Offset Drift 50 ppm/C Full-Scale Gain Error GE External reference, T +25C -3.5 +1.5 %FS FS A Internal reference 100 Gain Drift ppm/C External reference 50 Full-Scale Output Current I (Note 1) 2 20 mA OUT Min Output Voltage Single ended -0.5 V Max Output Voltage Single ended 1.1 V Output Resistance R 1M OUT Output Capacitance C 5pF OUT DYNAMIC PERFORMANCE Output Update Rate f 1 500 Msps CLK f = 100MHz f = 16MHz, -12dB FS -151 CLK OUT dB FS/ Noise Spectral Density Hz f = 200MHz f = 80MHz, -12dB FS -154 CLK OUT f = 1MHz, 0dB FS 88 OUT Spurious-Free Dynamic Range to SFDR f = 100MHz f = 1MHz, -6dB FS 86 dBc CLK OUT Nyquist f = 1MHz, -12dB FS 80 OUT 2 MAX5886