MAX5888 19-2726 Rev 3 12/03 3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs General Description Features The MAX5888 is an advanced, 16-bit, 500Msps digital- 500Msps Output Update Rate to-analog converter (DAC) designed to meet the Single 3.3V Supply Operation demanding performance requirements of signal synthe- sis applications found in wireless base stations and Excellent SFDR and IMD Performance other communications applications. Operating from a SFDR = 76dBc at f = 40MHz (to Nyquist) OUT single 3.3V supply, this DAC offers exceptional dyna- IMD = -85dBc at f = 10MHz OUT mic performance such as 76dBc spurious-free dynamic ACLR = 73dB at f = 61MHz OUT range (SFDR) at f = 40MHz. The DAC supports OUT 2mA to 20mA Full-Scale Output Current update rates of 500Msps and a power dissipation of only 250mW. Differential, LVDS-Compatible Digital and Clock The MAX5888 utilizes a current-steering architecture, Inputs which supports a full-scale output current range of 2mA On-Chip 1.2V Bandgap Reference to 20mA, and allows a differential output voltage swing between 0.1V and 1V . P-P P-P Low 130mW Power Dissipation The MAX5888 features an integrated 1.2V bandgap ref- 68-Lead QFN-EP Package erence and control amplifier to ensure high accuracy and low noise performance. Additionally, a separate reference input pin enables the user to apply an exter- Ordering Information nal reference source for optimum flexibility and to improve gain accuracy. PIN- PART TEMP RANGE PACKAGE The digital and clock inputs of the MAX5888 are designed for differential low-voltage differential signal MAX5888AEGK -40C to +85C 68 QFN-EP* (LVDS)-compatible voltage levels. The MAX5888 is MAX5888EGK -40C to +85C 68 QFN-EP* available in a 68-lead QFN package with an exposed *EP = Exposed paddle. paddle (EP) and is specified for the extended industrial temperature range (-40C to +85C). Pin Configuration Refer to the MAX5887 and MAX5886 data sheets for pin-compatible 14- and 12-bit versions of the MAX5888. TOP VIEW 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 Applications EP B3P 1 51 B11N Base Stations: Single-/Multicarrier UMTS, B3N 2 50 B11P B2P 3 49 B12N CDMA, GSM B2N 4 48 B12P Communications: LMDS, MMDS, Point-to-Point B1P 5 47 B13N Microwave B1N 6 46 B13P B0P 7 45 B14N Digital Signal Synthesis B0N 8 44 B14P MAX5888 DGND 9 43 B15N Automated Test Equipment (ATE) DV 10 42 B15P DD Instrumentation VCLK 11 41 DGND CLKGND 12 40 DV DD CLKP 13 39 SEL0 CLKN 14 38 N.C. CLKGND 15 37 N.C. VCLK 16 36 N.C. PD 17 N.C. 35 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 QFN Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. AV B4N DD AGND B4P REFIO B5N FSADJ B5P DACREF B6N N.C. B6P AV DGND DD AGND DV DD IOUTN DGND IOUTP B7N AGND B7P AV DD B8N AVDD B8P AGND B9N AV DD B9P AGND B10N N.C. B10P3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs ABSOLUTE MAXIMUM RATINGS AV , DV , VCLK to AGND................................-0.3V to +3.9V Continuous Power Dissipation (T = +70C) DD DD A AV , DV , VCLK to DGND ...............................-0.3V to +3.9V 68-Lead QFN-EP (derate 41.7mW/C above +70C) ...3333mW DD DD AV , DV , VCLK to CLKGND ...........................-0.3V to +3.9V Thermal Resistance ( ) ..............................................+24C/W DD DD JA AGND, CLKGND to DGND....................................-0.3V to +0.3V Operating Temperature Range ..........................-40C to +85C DACREF, REFIO, FSADJ to AGND.............-0.3V to AV + 0.3V Junction Temperature .....................................................+150C DD IOUTP, IOUTN to AGND................................-1V to AV + 0.3V Storage Temperature Range ............................-60C to +150C DD CLKP, CLKN to CLKGND...........................-0.3V to VCLK + 0.3V Lead Temperature (soldering, 10s) ................................+300C B0P/B0NB15P/B15N, SEL0, PD to DGND...........................................-0.3V to DV + 0.3V DD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AV = DV = VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V = 1.25V, differential transformer-coupled DD DD REFIO analog output, 50 double terminated (Figure 7), I = 20mA, T = T to T , unless otherwise noted. +25C guaranteed by OUT A MIN MAX production test, <+25C guaranteed by design and characterization. Typical values are at T = +25C.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution 16 Bits MAX5888A , measured differentially, -0.008 0.004 +0.008 T +25C A Integral Nonlinearity INL % FS MAX5888 , measured differentially, 0.006 T +25C A MAX5888A , measured differentially, -0.006 0.002 +0.006 T +25C A Differential DNL % FS Nonlinearity MAX5888 , measured differentially, 0.003 T +25C A Offset Error OS -0.025 0.003 +0.025 %FS Offset Drift 50 ppm/C Full-Scale Gain Error GE External reference, T +25C -3.1 +1.1 %FS FS A Internal reference 100 Gain Drift ppm/C External reference 50 Full-Scale Output Current I (Note 1) 2 20 mA OUT Min Output Voltage Single ended -0.5 V Max Output Voltage Single ended 1.1 V Output Resistance R 1M OUT Output Capacitance C 5pF OUT DYNAMIC PERFORMANCE Output Update Rate f 1 500 Msps CLK f = 300MHz f = 16MHz, -12dB FS -165 CLK OUT dB FS/ Noise Spectral Density Hz f = 500MHz f = 16MHz, -12dB FS -164 CLK OUT f = 1MHz, 0dB FS 88 OUT Spurious-Free Dynamic Range to SFDR f = 100MHz dBc f = 1MHz, -6dB FS 89 CLK OUT Nyquist f = 1MHz, -12dB FS 85 OUT 2 MAX5888