MAX5889 19-3620 Rev 1 3/07 12-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs General Description Features The MAX5889 advanced 12-bit, 600Msps, digital-to- 600Msps Output Update Rate analog converter (DAC) meets the demanding perfor- Low-Noise Spectral Density: -157dBFS/Hz at mance requirements of signal synthesis applications f = 36MHz found in wireless base stations and other communica- OUT tions applications. Operating from 3.3V and 1.8V sup- Excellent SFDR and IMD Performance plies, the MAX5889 DAC supports update rates of SFDR = 79dBc at f = 30MHz (to Nyquist) OUT 600Msps using high-speed LVDS inputs while consum- SFDR = 67dBc at f = 130MHz (to Nyquist) OUT ing only 292mW of power and offers exceptional IMD = -95dBc at f = 30MHz OUT dynamic performance such as 79dBc spurious-free IMD = -70dBc at f = 130MHz OUT dynamic range (SFDR) at f = 30MHz. OUT ACLR = 72dB at f = 122.88MHz OUT The MAX5889 utilizes a current-steering architecture that supports a 2mA to 20mA full-scale output current range, 2mA to 20mA Full-Scale Output Current and produces -2dBm to -22dBm full-scale output signal LVDS-Compatible Digital Inputs levels with a double-terminated 50 load. The MAX5889 features an integrated 1.2V bandgap reference and con- On-Chip 1.2V Bandgap Reference trol amplifier to ensure high-accuracy and low-noise per- Low 292mW Power Dissipation at 600Msps formance. A separate reference input (REFIO) allows for the use of an external reference source for optimum flexi- Compact (10mm x 10mm) QFN-EP Package bility and improved gain accuracy. Evaluation Kit Available (MAX5891EVKIT) The MAX5889 digital inputs accept LVDS voltage lev- els, and the flexible clock input can be driven differen- Ordering Information tially or single-ended, AC- or DC-coupled. The MAX5889 is available in a 68-pin QFN package with an PIN- PKG PART TEMP RANGE exposed paddle (EP) and is specified for the extended PACKAGE CODE (-40C to +85C) temperature range. MAX5889EGK-D -40C to +85C 68 QFN-EP* G6800-4 Refer to the MAX5891 and MAX5890 data sheets for pin- MAX5889EGK+D -40C to +85C 68 QFN-EP* G6800-4 compatible 16-bit and 14-bit versions of the MAX5889. *EP = Exposed paddle. Applications D = Dry pack. +Denotes lead-free package. Base Stations: Single-Carrier UMTS, Functional Diagram CDMA, GSM Communications: Fixed Broadband Wireless Access, Point-to-Point Microwave MAX5889 Direct Digital Synthesis (DDS) OUTP Cable Modem Termination Systems (CMTS) D0D11 600MHz LVDS Automated Test Equipment (ATE) LVDS DATA LATCH 12-BIT DAC RECEIVER INPUTS Instrumentation OUTN DACREF Selector Guide REFIO 1.2V REFERENCE RESOLUTION UPDATE RATE FSADJ CLKP PART LOGIC INPUT CLK (BITS) (Msps) INTERFACE CLKN MAX5889 12 600 LVDS POWER PD DOWN MAX5890 14 600 LVDS MAX5891 16 600 LVDS Pin Configuration appears at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLE12-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs ABSOLUTE MAXIMUM RATINGS AV , DV to AGND, DGND, DACREF, Digital Data Inputs (D0ND11N, D0PD11P) to AGND, DD1.8 DD1.8 and CGND.......................................................-0.3V to +2.16V DGND, DACREF, and CGND ..........-0.3V to (DV + 0.3V) DD1.8 AV , DV , AV to AGND, DGND, Continuous Power Dissipation (T = +70C) (Note 1) DD3.3 DD3.3 CLK A DACREF, and CGND.........................................-0.3V to +3.9V 68-Pin QFN-EP (derate 28.6mW/C above +70C)....3333mW REFIO, FSADJ to AGND, DACREF, Thermal Resistance (Note 1) ....................................24C/W JA DGND, and CGND ..........................-0.3V to (AV + 0.3V) Operating Temperature Range ..........................-40C to +85C DD3.3 OUTP, OUTN to AGND, DGND, DACREF, Junction Temperature .....................................................+150C and CGND .......................................-1.2V to (AV + 0.3V) Storage Temperature Range ............................-60C to +150C DD3.3 CLKP, CLKN to AGND, DGND, DACREF, Lead Temperature (soldering, 10s) ................................+300C and CGND..........................................-0.3V to (AV + 0.3V) CLK PD to AGND, DGND, DACREF, and CGND.......................................-0.3V to (DV + 0.3V) DD3.3 Note 1: Thermal resistance based on a multilayer board with 4 x 4 via array in exposed paddle area. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AV = DV = AV = 3.3V, AV = DV = 1.8V, external reference V = 1.2V, output load 50 double-terminat- DD3.3 DD3.3 CLK DD1.8 DD1.8 REFIO ed, transformer-coupled output, I = 20mA, T = -40C to +85C, unless otherwise noted. Specifications at T +25C are guar- OUT A A anteed by production testing. Specifications at T < +25C are guaranteed by design and characterization. Typical values are at T A A = +25C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution 12 Bits Integral Nonlinearity INL Measured differentially 0.25 LSB Differential Nonlinearity DNL Measured differentially 0.15 LSB Offset Error OS -0.02 0.001 +0.02 %FS Full-Scale Gain Error GE External reference -4 1+4 %FS FS Internal reference 130 Gain-Drift Tempco ppm/C External reference 100 Full-Scale Output Current I 220mA OUT Output Compliance Single-ended -1.0 +1.1 V Output Resistance R 1M OUT Output Capacitance C 5pF OUT Output Leakage Current PD = high, power-down mode 1A DYNAMIC PERFORMANCE Maximum DAC Update Rate 600 Msps Minimum DAC Update Rate 1 Msps f = 36MHz, OUT f = 500MHz, CLK -157 A = -3.5dBm FULL-SCALE -12dBFS, 20MHz Noise Spectral Density N dBFS/Hz offset from the f = 151MHz, OUT -152 carrier A = -6.4dBm FULL-SCALE 2 MAX5889