EVALUATION KIT AVAILABLE MAX5891 16-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs General Description Features The MAX5891 advanced 16-bit, 600Msps, digital-to- 600Msps Output Update Rate analog converter (DAC) meets the demanding perfor- Low Noise Spectral Density: -163dBFS/Hz at mance requirements of signal synthesis applications f = 36MHz OUT found in wireless base stations and other communications Excellent SFDR and IMD Performance applications. Operating from 3.3V and 1.8V supplies, the SFDR = 80dBc at f = 30MHz (to Nyquist) OUT MAX5891 DAC supports update rates of 600Msps using SFDR = 71dBc at f = 130MHz (to Nyquist) OUT high-speed LVDS inputs while consuming only 298mW IMD = -95dBc at f = 30MHz OUT of power and offers exceptional dynamic performance IMD = -70dBc at f = 130MHz OUT such as 80dBc spurious-free dynamic range (SFDR) at ACLR = 73dB at f = 122.88MHz f = 30MHz. OUT OUT 2mA to 20mA Full-Scale Output Current The MAX5891 utilizes a current-steering architecture that supports a 2mA to 20mA full-scale output current range, LVDS-Compatible Digital Inputs and produces -2dBm to -22dBm full-scale output signal On-Chip 1.2V Bandgap Reference levels with a double-terminated 50 load. The MAX5891 Low 298mW Power Dissipation at 600Msps features an integrated 1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise Compact (10mm x 10mm) QFN-EP Package performance. A separate reference input (REFIO) allows Evaluation Kit Available (MAX5891EVKIT) for the use of an external reference source for optimum flexibility and improved gain accuracy. Ordering Information The MAX5891 digital inputs accept LVDS voltage levels, and the flexible clock input can be driven differentially or PKG PART TEMP RANGE PIN-PACKAGE single-ended, AC- or DC-coupled. The MAX5891 is avail- CODE able in a 68-pin QFN package with an exposed paddle MAX5891EGK-D -40C to +85C 68 QFN-EP* G6800-4 (EP) and is specified for the extended (-40C to +85C) MAX5891EGK+D -40C to +85C 68 QFN-EP* G6800-4 temperature range. *EP = Exposed paddle. Refer to the MAX5890 and MAX5889 data sheets for pin- + = Lead-free package. compatible 14-bit and 12-bit versions of the MAX5891. D = Dry pack. Applications Functional Diagram Base Stations: Single/Multicarrier UMTS, CDMA, GSM Communications: Fixed Broadband Wireless MAX5891 Access, Point-to-Point Microwave OUTP Direct Digital Synthesis (DDS) Cable Modem Termination Systems (CMTS) D0D15 LVDS 600MHz LVDS DATA LATCH Automated Test Equipment (ATE) 16-BIT DAC RECEIVER INPUTS Instrumentation OUTN Selector Guide DACREF RESOLUTION UPDATE RATE REFIO 1.2V PART LOGIC INPUT REFERENCE (BITS) (Msps) FSADJ CLKP CLK MAX5889 12 600 LVDS INTERFACE CLKN MAX5890 14 600 LVDS POWER PD DOWN MAX5891 16 600 LVDS Pin Configuration appears at end of data sheet. 19-3542 Rev 4 2/07MAX5891 16-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs Absolute Maximum Ratings AV , DV to AGND, DGND, DACREF, Digital Data Inputs (D0ND15N, D0PD15P) to AGND, DD1.8 DD1.8 and CGND ......................................................-0.3V to +2.16V DGND, DACREF, and CGND ........ -0.3V to (DV + 0.3V) DD1.8 AV , DV , AV to AGND, DGND, Continuous Power Dissipation (T = +70C) (Note 1) DD3.3 DD3.3 CLK A DACREF, and CGND........................................-0.3V to +3.9V 68-Pin QFN-EP (derate 28.6mW/C above +70C) ..3333mW REFIO, FSADJ to AGND, DACREF, Thermal Resistance (Note 1) ...................................24C/W JA DGND, and CGND .........................-0.3V to (AV + 0.3V) Operating Temperature Range ........................... -40C to +85C DD3.3 OUTP, OUTN to AGND, DGND, DACREF, Junction Temperature ......................................................+150C and CGND ......................................-1.2V to (AV + 0.3V) Storage Temperature Range ............................ -60C to +150C DD3.3 CLKP, CLKN to AGND, DGND, DACREF, Lead Temperature (soldering, 10s) .................................+300C and CGND ........................................ -0.3V to (AV + 0.3V) CLK PD to AGND, DGND, DACREF, and CGND ..................................... -0.3V to (DV + 0.3V) DD3.3 Note 1: Thermal resistance based on a multilayer board with 4x4 via array in exposed paddle area. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (AV = DV = AV = 3.3V, AV = DV = 1.8V, external reference V = 1.2V, output load 50 double-terminated, DD3.3 DD3.3 CLK DD1.8 DD1.8 REFIO transformer-coupled output, I = 20mA, T = -40C to +85C, unless otherwise noted. Specifications at T +25C are guaranteed OUT A A by production testing. Specifications at T < +25C are guaranteed by design and characterization. Typical values are at T = +25C.) A A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution 16 Bits Integral Nonlinearity INL Measured differentially 3.8 LSB Differential Nonlinearity DNL Measured differentially 2.8 LSB Offset Error OS -0.02 0.001 +0.02 %FS Full-Scale Gain Error GE External reference -4 1 +4 %FS FS Internal reference 130 Gain-Drift Tempco ppm/C External reference 100 Full-Scale Output Current I 2 20 mA OUT Output Compliance Single-ended -1.0 +1.1 V Output Resistance R 1 M OUT Output Capacitance C 5 pF OUT Output Leakage Current PD = high, power-down mode 1 A DYNAMIC PERFORMANCE Maximum DAC Update Rate 600 Msps Minimum DAC Update Rate 1 Msps f = 36MHz f = 500MHz, OUT CLK -163 A = -3.5dBm -12dBFS, 20MHz FULL-SCALE Noise Spectral Density N dBFS/Hz offset from the f = 151MHz OUT -155 carrier A = -6.4dBm FULL-SCALE Maxim Integrated 2 www.maximintegrated.com