MAX5969D 19-5926 Rev 0 6/11 IEEE 802.3af/at-Compliant, Powered Device Interface Controller with Integrated Power MOSFET General Description Features S IEEE 802.3af/at Compliant The MAX5969D provides a complete interface for a powered device (PD) to comply with the IEEE 802.3af/ S 2-Event Classification or an External Wall Adapter at standard in a power-over-Ethernet (PoE) system. The Indicator Output MAX5969D provides the PD with a detection signa- S Simplified Wall Adapter Interface ture, classification signature, and an integrated isolation S PoE Classification 05 power switch with inrush current control. During the inrush period, the MAX5969D limits the current to less S 100V Input Absolute Maximum Rating than 180mA before switching to the higher current limit S Inrush Current Limit of 180mA Maximum (720mA to 880mA) when the isolation power MOSFET S Current Limit During Normal Operation Between is fully enhanced. The device features an input UVLO 720mA and 880mA with wide hysteresis and long deglitch time to compen- S Current Limit and Foldback sate for twisted-pair cable resistive drop and to assure glitch-free transition during power-on/-off conditions. The S Legacy UVLO at 36V MAX5969D can withstand up to 100V at the input. S Overtemperature Protection The MAX5969D supports a 2-event classification method S Thermally Enhanced, 5mm x 5mm, 16-Pin TQFN as specified in the IEEE 802.3at standard and provide a signal to indicate when probed by a Type 2 power sourc- Applications ing equipment (PSE). The device detects the presence of a wall adapter power source connection and allow a IEEE 802.3af/at Powered Devices smooth switch over from the PoE power source to the IP Phones, Wireless Access Nodes, IP Security wall power adaptor. Cameras The MAX5969D also provides a power-good (PG) signal, WiMAXK Base Stations two-step current limit and foldback, overtemperature pro- tection, and di/dt limit. The MAX5969D is available in a 16-pin, 5mm x 5mm TQFN power package. This device is rated over the -40NC to +85NC extended temperature range. Ordering Information PART TEMP RANGE PIN-PACKAGE MAX5969DETE+ -40NC to +85NC 16 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. WiMAX is a trademark of WiMAX Forum. IEEE is a registered service mark of the Institute of Electrical and Electronics Engineers, Inc. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.IEEE 802.3af/at-Compliant, Powered Device Interface Controller with Integrated Power MOSFET ABSOLUTE MAXIMUM RATINGS V to V ..........................................................-0.3V to +100V Operating Temperature Range .......................... -40NC to +85NC DD SS Maximum Junction Temperature .....................................+150NC DET, RTN, WAD, PG, 2EC to V -0.3V to +100V SS ....................... Storage Temperature Range ............................ -65NC to +150NC CLS to V ..............................................................-0.3V to +6V SS Lead Temperature (soldering, 10s) .............................. +300NC Maximum Current on CLS (100ms maximum) .................100mA Soldering Temperature ................................................. +260NC Continuous Power Dissipation (T = +70NC) (Note 1) A TQFN (derate 28.6mW/NC above +70NC) Multilayer Board .....................................................2285.7mW Note 1: Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 specifications. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 2) TQFN Junction-to-Ambient Thermal Resistance (B ..............35NC/W JA) Junction-to-Case Thermal Resistance (B .................2.7NC/W JC) Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-lay- er board. For detailed information on package thermal considerations, refer to