ABRIDGED EVALUATION KIT AVAILABLE Click here to ask about the production status of specific part numbers. MAX77511/MAX77711 10V Input, Quad-Phase Configurable, 3A/Phase, High-Efficiency Buck Converter General Description Benefits and Features The MAX77511/MAX77711 are four-phase, 3A/phase, 3A/Phase Configurable Buck Regulator configurable single to quad output, step-down buck regu- 3A, 6A, 9A, or 12A Output Current Capability lators for 1s/2s Li+ battery inputs. Output voltage is pro- 2.3V to 10V Input Voltage Range 2 grammable through an I C interface between 0.25V and 0.25V to 5.2V Output Voltage Range 5.2V. The buck has four combinable 3A switching phases 0.25V to 1.3V (5mV steps) in Low-Range () for up to four regulated outputs. Phases are config- 1V to 5.2V (20mV steps) in High-Range urable to higher-current multiphase outputs: 4, (3+1), Pin Programmable Output/Phase () Configuration (2+2), (2+1+1), or (1+1+1+1). 4, (3+1), (2+2), (2+1+1), (1+1+1+1) Six GPIOs can be purposed for I/O expansion or buck sta- High-Efficiency and Low-Heat tus and control. Pseudo-random spread-spectrum modu- Uses Small 2520 Inductor lation suppresses EMI. Soft-start, soft-stop, and DVS slew 2 1MHz Nominal Switching Frequency per Phase times are programmable with I C. MAX77711 offers a Pseudo-Random Spread-Spectrum Options 300mA linear regulator. Six Multi-Function GPIOs for Hardware Buck Control MAX77511/MAX77711 are available in a 64-bump, Enable, DVS, FPWM, and Power-OK 3.54mm x 3.54mm wafer-level package (WLP). 300mA pMOS LDO (MAX77711 Only) Built-In Flexible Power Sequencing with Soft-Start/ Applications Stop DSLR, Mirrorless, HD Video, and Action Cameras Protection Features 2-Cell Li+/Li-ion Equipment Hard and Soft-Short Protection, UVLO, and Notebook Computers and Robots Thermal Protection Embedded Microprocessors, FPGAs, or ASICs Simplified Block Diagram MAX77511/MAX77711MAX77511/MAX77711 IN1/IN2 LX1 1 3A DC SOURCE + 2.3V to 10V IN3/IN4 LX2 1 3A V OUT1 + 1 3A SNS1+ 0.25V TO 5.2V SYS + 2 6A 6A MAX 1 + 3A SNS1- 1 PGND + 3A 1 PHCFG1 3A BUCK LX3 PHCFG0 REGULATOR V OUT3 6A SNS3+ 0.25V TO 5.2V GPIO1 2 2+1+1 BEN1 3A MAX + CONFIG SNS3- GPIO2 2 EXAMPLE GPIO DVS1 6A MAPPED GPIO & GPIO3 FPWM1 FUNCTIONS SPECIAL GPIO4 FUNCTION LX4 POK1 V OUT4 9A MUX GPIO5 3 SNS4+ 0.25V TO 5.2V + GENERAL-PURPOSE I/O 3A MAX 1 GPIO6 SNS4- 3A INLDO DC SOURCE 4 VIO 300mA LDO 12A 1.25V-5.5V (MAX77711 LDO SCL VLDO ONLY) DIGITAL SERIAL HOST 0.4V to 1.975V SDA CONTROL BUCK 300mA MAX PHASE-CONFIGURABLE nIRQ CURRENT AMUX SIMPLIFIED, SOME TO SYSTEM ADC MONITOR QUAD-OUTPUT PINS NOT DRAWN 19-100381 Rev 4 6/21ABRIDGED MAX77511/MAX77711 10V Input, Quad-Phase Configurable, 3A/Phase, High-Efficiency Buck Converter Package Information 64 WLP Package Code W643D3+1 Outline Number 21-100211 Land Pattern Number Refer to Application Note 1891 Thermal Resistance, Four-Layer Board: Junction to Ambient ( ) 38.20C/W JA E Marking Pin 1 see Note 7 Indic ator 1 COMMON DIMENSIONS A A 0.64 0.05 A1 0.03 0.19 A2 0.45 REF AAAA D A3 0.040 BASIC b 0.27 0.03 D 3.538 0.025 E 3.538 0.025 D1 2.80 BASIC E1 SIDE VIEW 2.80 A3 TOP VIEW BASIC e 0.40 BASIC A1 S SD 0.20 BASIC A2 A SE 0.20 BASIC 0.05 S DEPOPULATED BUMPS: FRONT VIEW NONE E1 SE e H NOTES: 1. Terminal pitc h is defined by terminal c enter to c enter value. G 2. Outer dimension is defined by c enter lines between sc ribe lines. SD 3. All dimensions in millimeter. F B 4. Marking shown is for pac kage orientation referenc e only. E D1 5. Toleranc e is 0.02 unless spec ified otherwise. 6. All dimensions apply to PbFree (+) pac kage c odes only. D 7. Front - side finish c an be either Blac k or Clear. C B A maxim TM integrated 1 2 3 4 5 6 7 8 b TITLE M S 0.05 AB PACKAGE OUTLINE 64 BUMPS A WLP PKG. 0.4 mm PITCH,W643D3+1 BOTTOM VIEW APPROVAL DOCUMENT CONTROL NO. REV. 1 - DRAWING NOT TO SCALE - 21-100211 B 1 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a +, , or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. www.maximintegrated.com Maxim Integrated 2