MAX9173 19-2595 Rev 0 10/02 Quad LVDS Line Receiver with Flow-Through Pinout and In-Path Fail-Safe General Description Features The MAX9173 quad low-voltage differential signaling Accepts LVDS and LVPECL Inputs (LVDS) line receiver is ideal for applications requiring Fully Compatible with DS90LV048A high data rates, low power, and low noise. The Low 1.0mA (max) Disable Supply Current MAX9173 is guaranteed to receive data at speeds up to 500Mbps (250MHz) over controlled-impedance In-Path Fail-Safe Circuitry media of approximately 100 . The transmission media Flow-Through Pinout can be printed circuit (PC) board traces or cables. Simplifies PC Board Layout The MAX9173 accepts four LVDS differential inputs and Reduces Crosstalk translates them to LVCMOS/LVTTL outputs. The Guaranteed 500Mbps Data Rate MAX9173 inputs are high impedance and require an 400ps Pulse Skew (max) external termination resistor when used in a point-to- point connection. Conforms to ANSI TIA/EIA-644 LVDS Standard The device supports a wide common-mode input range High-Impedance LVDS Inputs when Powered-Off of 0.05V to V - 0.05V, allowing for ground potential CC Available in Tiny 3mm x 3mm QFN Package differences and common-mode noise between the dri- ver and the receiver. A fail-safe feature sets the output Ordering Information high when the inputs are open, or when the inputs are undriven and shorted or undriven and parallel terminat- PART TEMP RANGE PIN-PACKAGE ed. The EN and EN inputs control the high-impedance MAX9173EUE -40C to +85C 16 TSSOP outputs. The enables are common to all four receivers. Inputs conform to the ANSI TIA/EIA-644 LVDS stan- MAX9173ESE -40C to +85C 16 SO dard. The flow-through pinout simplifies board layout MAX9173ETE* -40C to +85C 16 Thin QFN-EP** and reduces crosstalk by separating the LVDS inputs *Future product. Contact factory for availability. and LVCMOS/LVTTL outputs. The MAX9173 operates **EP = Exposed pad. from a single 3.3V supply, and is specified for opera- tion from -40C to +85C. Refer to the MAX9121/ MAX9122 data sheet for lower jitter quad LVDS Typical Operating Circuit receivers with parallel fail-safe. Refer to the MAX9123 data sheet for a quad LVDS line driver with flow- LVDS SIGNALS through pinout. MAX9123 MAX9173 The device is available in 16-pin TSSOP, SO, and space-saving thin QFN packages. Tx 100 Rx Applications Digital Copiers Tx 100 Rx Laser Printers Cellular Phone Base Stations LVTTL/LVCMOS LVTTL/LVCMOS DATA INPUTS DATA OUTPUTS Network Switches/Routers Backplane Interconnect Tx 100 Rx Clock Distribution LCD Displays Telecom Switching Equipment Tx 100 Rx Pin Configurations and Functional Diagram appear at end of 100 SHIELDED TWISTED CABLE OR MICROSTRIP BOARD TRACES data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.Quad LVDS Line Receiver with Flow-Through Pinout and In-Path Fail-Safe ABSOLUTE MAXIMUM RATINGS V to GND ..........................................................-0.3V to +4.0V Junction Temperature......................................................+150C CC IN +, IN - to GND .................................................-0.3V to +4.0V Storage Temperature Range .............................-65C to +150C OUT , EN, EN to GND................................-0.3V to (V + 0.3V) ESD Protection (Human Body Model, IN +, IN -) ............7.0kV CC Continuous Power Dissipation (T = +70C) Lead Temperature (soldering, 10s) .................................+300C A 16-Pin TSSOP (derate 9.4mW/C above T = +70C)..755mW A 16-Pin SO (derate 8.7mW/C above T = +70C) ........696mW A 16-Pin QFN (derate 14.7mW/C above T = +70C)..1177mW A Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (V = 3.0V to 3.6V, differential input voltage V = 0.1V to 1.2V, common-mode input voltage V = V /2 to V - V /2 , outputs CC ID CM ID CC ID enabled, and T = -40C to +85C. Typical values are at V = 3.3V, V = 1.2V, V = 0.2V, and T = +25C, unless otherwise A CC CM ID A noted.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LVDS INPUTS (IN +, IN -) Differential Input High Threshold V -45 0 mV TH Differential Input Low Threshold V -100 -45 mV TL Input Current (Noninverting Input) I Figure 1 +0.5 -2.5 -5 A IN + Power-Off Input Current V = 0 to 3.6V, V = 0 to 3.6V, IN + IN - I -0.5 0 +0.5 A IN +OFF (Noninverting Input) V = 0 or open (Figure 1) CC Input Current (Inverting Input) I Figure 1 -0.5 +5.0 +10 A IN - Power-Off Input Current V = 0 to 3.6V, V = 0 to 3.6V, IN + IN - I -0.5 0 +0.5 A IN -OFF (Inverting Input) V = 0 or open, Figure 1 CC LVCMOS/LVTTL OUTPUTS (OUT ) Open, undriven short, or 2.7 3.2 undriven parallel termination Output High Voltage (Table 1) V I = -4.0mA V OH OH V = 0 2.7 3.2 ID Output Low Voltage V I = +4.0mA, V = -100mV 0.1 0.25 V OL OL ID Output Short-Circuit Current I V = 0 (Note 3) -45 -77 -120 mA OS OUT Output High-Impedance Current I Disabled, V = 0 or V -1 +1 A OZ OUT CC LOGIC INPUTS (EN, EN) Input High Voltage V 2.0 V V IH CC Input Low Voltage V 0 0.8 V IL Input Current I V = high or low -15 +15 A IN IN Input Clamp Voltage V I = -18mA -0.88 -1.5 V CL CL POWER SUPPLY Supply Current I Inputs open 12 15 mA CC Disabled Supply Current I Disabled, inputs open 0.56 1.0 mA CCZ 2 MAX9173