MAX9174/MAX9175 19-2827 Rev 1 4/04 670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters General Description Features The MAX9174/MAX9175 are 670MHz, low-jitter, low- 1.0ps Jitter (max) at 670MHz (RMS) skew 1:2 splitters ideal for protection switching, loop- 80ps Jitter (max) at 800Mbps Data Rate (P-P) back, and clock and signal distribution. The devices feature ultra-low 1.0ps random jitter (max) that (RMS) +3.3V Supply ensures reliable operation in high-speed links that are LVDS Fail-Safe Inputs (MAX9174) highly sensitive to timing errors. The MAX9174 has a fail-safe LVDS input and LVDS out- Anything Input (MAX9175) Accepts Differential puts. The MAX9175 has an anything differential input CML/LVDS/LVPECL (CML/LVDS/LVPECL) and LVDS outputs. The outputs Power-Down Inputs Tolerate -1.0V and V + 1.0V CC can be put into high impedance using the power-down inputs. The MAX9174 features a fail-safe circuit that dri- Low-Power CMOS Design ves the outputs high when the input is open, undriven 10-Lead MAX and Thin QFN Packages and shorted, or undriven and terminated. The MAX9175 has a bias circuit that forces the outputs high when the -40C to +85C Operating Temperature Range input is open. The power-down inputs are compatible Conform to ANSI TIA/EIA-644 LVDS Standard with standard LVTTL/LVCMOS logic. The power-down inputs tolerate undershoot of -1V and overshoot of V CC IEC 61000-4-2 Level 4 ESD Rating + 1V. The MAX9174/MAX9175 are available in 10-pin MAX and 10-lead thin QFN with exposed pad pack- Ordering Information ages, and operate from a single +3.3V supply over the -40C to +85C temperature range. PART TEMP RANGE PIN-PACKAGE MAX9174EUB -40C to +85C 10 MAX Applications MAX9174ETB* -40C to +85C 10 Thin QFN-EP** Protection Switching MAX9175EUB -40C to +85C 10 MAX Loopback MAX9175ETB* -40C to +85C 10 Thin QFN-EP** Clock Distribution *Future productcontact factory for availability. **EP = Exposed paddle. Functional Diagram and Pin Configurations appear at end of data sheet. Typical Application Circuit CLOCK DISTRIBUTION ASIC MAX9176 MAX9174 CLK IN CLK1 ASIC MAX9176 MAX9174 CLK IN CLK2 Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters ABSOLUTE MAXIMUM RATINGS V to GND.....-0.3V to +4.0V Storage Temperature Range .............................-65C to +150C CC IN+, IN- to GND..............................................-0.3V to +4.0V ESD Protection OUT +, OUT - to GND..........................................-0.3V to +4.0V Human Body Model (R = 1.5k , C = 100pF) D S PD0, PD1 to GND.......................................-1.4V to (V + 1.4V) IN+, IN-, OUT +, OUT -...............................................2kV CC Single-Ended and Differential Output Other Pins (V , PD0, PD1) ...............................................2kV CC Short-Circuit Duration (OUT +, OUT -) .....................Continuous IEC 61000-4-2 Level 4 (R = 330 , C = 150pF) D S Continuous Power Dissipation (T = +70C) Contact Discharge IN+, IN-, OUT +, OUT - ...................8kV A 10-Pin MAX (derate 5.6mW/C above +70C) ...........444mW Air-Gap Discharge IN+, IN-, OUT +, OUT - .................15kV 10-Lead QFN (derate 24.4mW/C above +70C) ......1951mW Lead Temperature (soldering, 10s) .................................+300C Maximum Junction Temperature .....................................+150C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, R = 100 1%, PD = high, differential input voltage V = 0.05V to 1.2V, MAX9174 input common-mode CC L ID voltage V = V /2 to (2.4V - V /2 ), MAX9175 input common-mode voltage V = V /2 to (V - V /2 ), T = -40C to CM ID ID CM ID CC ID A +85C, unless otherwise noted. Typical values are at V = +3.3V, V = 0.2V, V = +1.25V, T = +25C.) (Notes 1, 2, 3) CC ID CM A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIFFERENTIAL INPUT (IN+, IN-) Differential Input High Threshold V +50 mV TH Differential Input Low Threshold V -50 mV TL Input Current I I Figure 1 -20 +20 A IN+, IN- MAX9174 V = 0V or open, Figure 1 CC I IN+, V = 3.6V or 0V, V = 3.6V IN+ IN- Power-Off Input Current -20 +20 A I IN- MAX9175 or 0V, V = 0V or open, CC Figure 1 R 60 108 Fail-Safe Input Resistors IN1 V = 3.6V, 0V or open, Figure 1 k CC (MAX9174) R 200 394 IN2 Input Resistors R V = 3.6V, 0V or open, Figure 1 212 450 k IN3 CC (MAX9175) Input Capacitance C IN+ or IN- to GND (Note 4) 4.5 pF IN LVTTL/LVCMOS INPUTS (PPPPDDDD0000, PPPPDDDD1111) V + CC Input High Voltage V 2.0 V IH 1 Input Low Voltage V -1.0 +0.8 V IL -1.0V PD 0V -1.5 mA Input Current I 0V PD V -20 +20 A IN CC V PD V + 1.0V +1.5 mA CC CC LVDS OUTPUTS (OUT +, OUT -) Differential Output Voltage V Figure 2 250 393 475 mV OD Change in Differential Output V Figure 2 1.0 15 mV OD Voltage Between Logic States Offset Voltage V Figure 3 1.125 1.29 1.375 V OS 2 MAX9174/MAX9175