EVALUATION KIT AVAILABLE MAX9205/MAX9207 10-Bit Bus LVDS Serializers General Description Features The MAX9205/MAX9207 serializers transform 10-bit- Standalone Serializer (vs. SERDES) Ideal for wide parallel LVCMOS/LVTTL data into a serial high- Unidirectional Links speed bus low-voltage differential signaling (LVDS) data stream. The serializers typically pair with deserial- Framing Bits for Deserializer Resync Allow Hot izers like the MAX9206/MAX9208, which receive the Insertion Without System Interruption serial output and transform it back to 10-bit-wide paral- LVDS Serial Output Rated for Point-to-Point and lel data. Bus Applications The MAX9205/MAX9207 transmit serial data at speeds Wide Reference Clock Input Range up to 400Mbps and 660Mbps, respectively, over PCB 16MHz to 40MHz (MAX9205) traces or twisted-pair cables. Since the clock is recov- ered from the serial data stream, clock-to-data and 40MHz to 66MHz (MAX9207) data-to-data skew that would be present with a parallel Low 140ps (pk-pk) Deterministic Jitter (MAX9207) bus are eliminated. Low 34mA Supply Current (MAX9205) The serializers require no external components and few control signals. The input data strobe edge is selected 10-Bit Parallel LVCMOS/LVTTL Interface by TCLK R/F. PWRDN is used to save power when the Up to 660Mbps Payload Data Rate (MAX9207) devices are not in use. Upon power-up, a synchroniza- tion mode is activated, which is controlled by two SYNC Programmable Active Edge on Input Latch inputs, SYNC1 and SYNC2. Pin-Compatible Upgrades to DS92LV1021 and The MAX9205 can lock to a 16MHz to 40MHz system DS92LV1023 clock, while the MAX9207 can lock to a 40MHz to 66MHz system clock. The serializer output is held in Ordering Information high impedance until the device is fully locked to the local system clock, or when the device is in power- REF CLOCK TEMP PIN- down mode. PART RANGE RANGE PACKAGE Both the devices operate from a single +3.3V supply, (MHz) are specified for operation from -40C to +85C, and MAX9205EAI+ -40C to +85C 28 SSOP 16 to 40 are available in 28-pin SSOP packages. M AX92 05E AI/V + -40C to +85C 28 SSOP 16 to 40 Applications MAX9207EAI+ -40C to +85C 28 SSOP 40 to 66 Cellular Phone Base DSLAMs +Denotes a lead(Pb)-free/RoHS-compliant package. Stations /V denotes an automotive qualified part. Network Switches and Add Drop Muxes Routers Pin Configuration and Functional Diagram appear at end of Digital Cross-Connects Backplane Interconnect data sheet. Typical Application Circuit BUS OUT+ LVDS IN+ 10 10 100 100 IN OUT OUT- IN- TCLK R/F PCB OR TWISTED PAIR REFCLK TCLK EN EN TIMING AND TIMING AND PLL PLL CONTROL LOCK CONTROL PWRDN SYNC 1 RCLK CLOCK MAX9205 MAX9206 RECOVERY RCLK R/F SYNC 2 MAX9207 MAX9208 For pricing, delivery, and ordering information, please contact Maxim Direct 19-2029 Rev 2 10/12 at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com. INPUT LATCH PARALLEL-TO-SERIAL SERIAL-TO-PARALLEL OUTPUT LATCHMAX9205/MAX9207 10-Bit Bus LVDS Serializers ABSOLUTE MAXIMUM RATINGS AVCC, DVCC to GND..........................-0.3V to +4.0V Storage Temperature Range .............................-65C to +150C Junction Temperature......................................................+150C IN , SYNC1, SYNC2, EN, TCLK R/F, TCLK, Operating Temperature Range ...........................-40C to +85C PWRDN to GND......................................-0.3V to (V + 0.3V) CC ESD Protection (Human Body Model, OUT+, OUT-) ...........8kV OUT+, OUT- to GND .............................................-0.3V to +4.0V Lead Temperature (soldering, 10s) .................................+300C Output Short-Circuit Duration.....................................Continuous Soldering Temperature (reflow) .......................................+260C Continuous Power Dissipation (T = +70C) A 28-Pin SSOP (derate 9.5mW/C above +70C) ..........762mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) SSOP Junction-to-Ambient Thermal Resistance ( )...............68C/W JA Junction-to-Case Thermal Resistance ( )......................25C/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. DC ELECTRICAL CHARACTERISTICS (V = V = +3.0V to +3.6V, R = 27 1% or 50 1%, C = 10pF, T = -40C to +85C. Typical values are at V = AVCC DVCC L L A AVCC V = +3.3V and T = +25C, unless otherwise noted.) (Notes 2, 3, 4) DVCC A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LVCMOS/LVTLL LOGIC INPUTS (IN0 TO IN9, EN, SYNC1, SYNC2, TCLK, TCLK R/F, PWRDN) High-Level Input Voltage V 2.0 V V IH CC Low-Level Input Voltage V GND 0.8 V IL Input Current I V = 0V or V -20 +20 A IN IN VCC BUS LVDS OUTPUTS (OUT+, OUT-) R = 27 200 286 400 mV L Differential Output Voltage V Figure 1 OD R = 50 250 460 600 mV L Change in V Between OD V Figure 1 1 35 mV OD Complementary Output States Output Offset Voltage V Figure 1 0.9 1.15 1.3 V OS Change in V Between OS V Figure 1 3 35 mV OS Complementary Output States V or V = 0V, OUT+ OUT- Output Short-Circuit Current I -13 -15 mA OS IN0 to IN9 = PWRDN = EN = high V or V = 0.8V, PWRDN EN Output High-Impedance Current I -10 +10 A OZ V or V = 0V or V OUT+ OUT- VCC Power-Off Output Current I V = 0V, V or V = 0V or 3.6V -10 +10 A OX VCC OUT+ OUT- POWER SUPPLY 16MHz 23 35 MAX9205 R = 27 or 50 L 40MHz 34 45 Supply Current I worst-case pattern mA CC 40MHz 32 50 (Figures 2, 4) MAX9207 66MHz 45 60 Power-Down Supply Current I PWRDN = low 8 mA CCX 2 Maxim Integrated