EVALUATION KIT AVAILABLE MAX9277/MAX9281 3.12Gbps GMSL Serializers for Coax or STP Output Drive and LVDS Input General Description Features and Benefits The MAX9277/MAX9281 are 3.12Gbps Gigabit Multimedia Ideal for High-Definition Video Applications Serial Link (GMSL) serializers with 3- or 4-data lane LVDS Drives Low-Cost 50 Coax Cable and FAKRA input (oLDI) and a CML serial output programmable for Connectors or 100 STP 50 coax or 100 shielded twisted pair (STP) cable drive. 104MHz High-Bandwidth Mode Supports The MAX9281 has HDCP content protection but other- 1920x720p/60Hz Display With 24-Bit Color wise is the same as the MAX9277. The serializers pair Serializer Pre/Deemphasis Allows 15m Cable at with any GMSL deserializer capable of coax input. When Full Speed programmed for STP output they are backward compat- Up to 192kHz Sample Rate and 32-Bit Sample ible with any GMSL deserializer. The output amplitude is Depth For 7.1 Channel HD Audio programmable 100mV to 500mV single-ended (coax) or Multiple Data Rates for System Flexibility 100mV to 400mV differential (STP). Up to 3.12Gbps Serial-Bit Rate 2 The audio channel supports L-PCM I S stereo and up to 8 6.25MHz to 104MHz Pixel Clock channels of L-PCM in TDM mode. Sample rates of 32kHz 9.6kbps to 1Mbps Control Channel in UART, to 192kHz are supported with sample depth up to 32 bits. 2 2 mixed UART/I C, or I C Mode with Clock Stretch The embedded control channel operates at 9.6kbps to Capability 2 1Mbps in UART-UART and UART-I C modes, and up to Reduces EMI and Shielding Requirements 2 2 1Mbps in I C-I C mode. Using the control channel, a C Serial Output Programmable for 100mV to 500mV can program serializer, deserializer and peripheral device Single-Ended or 100mV to 400mV Differential registers at any time, independent of video timing, and Programmable Spread Spectrum Reduces EMI manage HDCP operation (MAX9281). A GPO output sup- Bypassable Input PLL for Pixel Clock Jitter ports touch-screen controller interrupt requests from the Attenuation remote end of the link. Tracks Spread Spectrum on Input For use with longer cables, the serializers have program- High-Immunity Mode for Maximum Control- mable pre/deemphasis. Programmable spread spectrum Channel Noise Rejection is available on the serial output. The serial output meets Peripheral Features for System Power-Up and ISO 10605 and IEC61000-4-2 ESD standards. The core Verification supply is 1.7 to 1.9V and the I/O supply is 1.7 to 3.6V. Built-In PRBS Generator for BER Testing of the The package is a lead-free, 48-pin, 7mm x 7mm TQFN Serial Link with exposed pad, optional wettable flanks, and 0.5mm Programmable Choice of Nine Default Device lead pitch. Addresses Applications Dedicated Up/Down GPO for Touch-Screen High-Resolution Automotive Navigation Interrupt and Other Uses Rear-Seat Infotainment Remote/Local Wake-Up from Sleep Mode Megapixel Camera Systems Meets Rigorous Automotive and Industrial Requirements -40C to +105C Operating Temperature Ordering Information appears at end of data sheet. 8kV Contact and 15kV Air ISO 10605 and IEC 61000-4-2 ESD Protection 19-6764 Rev 4 8/19MAX9277/MAX9281 3.12Gbps GMSL Serializers for Coax or STP Output Drive and LVDS Input TABLE OF CONTENTS General Description ............................................................................ 1 Applications .................................................................................. 1 Features and Benefits .......................................................................... 1 Absolute Maximum Ratings ...................................................................... 8 Package Thermal Characteristics ................................................................. 8 DC Electrical Characteristics ..................................................................... 8 AC Electrical Characteristics .11 Typical Operating Characteristics ................................................................ 15 Pin Configuration ............................................................................. 17 Pin Description ............................................................................... 17 Functional Diagram ........................................................................... 20 Detailed Description........................................................................... 26 Register Mapping . 26 Input Bit Map . 27 Serial Link Signaling and Data Format . 29 Reserved Bit (RES)/CNTL1 30 Data-Rate Selection . 30 High-Bandwidth Mode . 30 Audio Channel 30 Audio Channel Input 32 Reverse Control Channel . 33 Control Channel and Register Programming 34 UART Interface 34 2 Interfacing Command-Byte-Only I C Devices With UART 35 UART Bypass Mode 35 2 I C Interface . 37 START and STOP Conditions . 37 Bit Transfer 37 Acknowledge 38 Slave Address . 38 Bus Reset . 38 Format for Writing 38 Format for Reading . 39 2 I C Communication with Remote Side Devices . 40 2 I C Address Translation 40 GPO/GPI Control . 40 Maxim Integrated 2 www.maximintegrated.com