EVALUATION KIT AVAILABLE MAX9633 Dual 36V Op Amp for 18-Bit SAR ADC Front-End General Description Benefits and Features The MAX9633 is a low-noise, low-distortion operational S High-Resolution ADC Driver amplifier that is optimized to drive ADCs for use in appli- 27MHz Gain Bandwidth cations from DC to a few MHz. The MAX9633 features 750ns Settling Time to 16-Bit Accuracy low noise (3nV/Hz at 1kHz and 3.5nV/Hz at 100Hz) THD of 130dB at 10kHz and low distortion (130dB at 10kHz), making it suitable Low Input Voltage Offset 200V (max) for industrial, medical, and test applications. 3nV/Hz Ultra-Low Input Voltage Noise Low Input Offset Temperature Drift 0.9V/C (max) The exceptionally fast settling-time and low input offset Unity Gain Stable voltage makes the IC an excellent solution to drive high- resolution 12-bit to 18-bit SAR ADCs. S Support a Wide Range of Industrial Applications 4.5V to 36V Wide Supply Range The IC operates from a wide supply voltage range up to 36V with only 3.5mA of quiescent current per amplifier. S Improved Reliability 5kV ESD Protection HBM The IC is offered in an 8-pin, 3mm x 3mm TDFN package S Saves Board Space for operation over the -40NC to +125NC temperature range. 8-Pin TDFN and SO Packages Applications Ordering Information ADC Drivers Data Acquisition and Instrumentation PIN- TOP PART TEMP RANGE PACKAGE MARK Power Grid Systems MAX9633ASA+ -40NC to +125NC 8 SO-EP* Motor Control MAX9633ATA+ -40NC to +125NC 8 TDFN-EP* BMM Test and Measurement Equipments +Denotes a lead(Pb)-free/RoHS-compliant package. Imaging Systems *EP = Exposed pad. High-Performance Audio Circuitry Typical Application Circuit MAX9633 ANTI-ALIAS FILTER +15V RR -3dB AT 8MHz IN R = 20I I 12 TO 18-BIT SAR ADC C C EXAMPLE: MAX1320 1MI 14-BIT ADC C = 1nF -15V R2 R1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com. 19-5199 Rev 4 1/15MAX9633 Dual 36V Op Amp for 18-Bit SAR ADC Front-End ABSOLUTE MAXIMUM RATINGS Supply Voltage (V to V ).................................-0.3V to +40V TDFN (derate 24.4mW/NC above +70NC) CC EE All Other Pins ..................................(V - 0.3V) to (V + 0.3V) Multilayer Board ........................................................1905mW EE CC Short-Circuit Duration of OUTA, OUTB ................................. 10s Operating Temperature Range ........................ -40NC to +125NC Continuous Input Current (any pins) ............................... 20mA Junction Temperature .....................................................+150NC Continuous Power Dissipation (T = +70NC) Storage Temperature Range ............................ -65NC to +150NC A SO (derate 24.4mW/NC above +70NC) Soldering Temperature (reflow) ......................................+260NC Multilayer Board .....................................................1951.2mW PACKAGE THERMAL CHARACTERISTICS (Note 1) SO-EP TDFN-EP Junction-to-Ambient Thermal Resistance (q ) ..........41C/W Junction-to-Ambient Thermal Resistance (q ) ..........42C/W JA JA Junction-to-Case Thermal Resistance (q ) .................7C/W Junction-to-Case Thermal Resistance (q ) .................8C/W JC JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-lay- er board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = +15V, V = -15V, V = 0V, R = 10kI to V = 0V, T = T to T , unless otherwise noted. Typical values are at CC EE CM L GND A MIN MAX T = +25NC.) (Note 2) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLY Supply Voltage Rang V - V Guaranteed by PSRR 4.5 36 V e CC EE T = +25NC 3.5 5 A Supply Current I Per amplifier -40NC P T P +85NC 6 mA CC A -40NC P T P +125NC 6.5 A T = +25NC 112 135 +4.5V P (V - V ) A CC EE Power-Supply Rejection Ratio PSRR dB P +36V -40NC P T P +125NC 110 A DC SPECIFICATIONS T = +25NC Q70 Q200 A Input Offset Voltage V FV OS -40NC P T P +125NC Q290 A Input Offset Voltage Drift DV -40NC P T P +125NC 0.2 0.9 FV/NC OS A (Note 3) (V + 0.45V) P V P (V - 1.8V) Q42 Q400 nA EE CM CC Input Bias Current I B V P V P (V - 1.8V) 4.5 22 FA EE CM CC (V + 0.45V) P V P (V - 1.8V) Q30 Q300 EE CM CC Input Offset Current I nA OS V P V P (V - 1.8V) Q200 Q2000 EE CM CC V - CC T = +25NC V A EE 1.7 Input Voltage Range V , V Guaranteed by CMRR V IN+ IN- -40NC P T P V - A CC V EE +125NC 1.8 V P V P (V - 1.7V), T = +25NC 106 130 EE CM CC A Common-Mode Rejection Ratio CMRR dB V P V P (V - 1.8V), -40NC P T P EE CM CC A 105 130 +125NC 2 Maxim Integrated