MAX98303 19-5494 Rev 0 9/10 Stereo 3.1W Class D Amplifier General Description Features The MAX98303 stereo 3.1W Class D amplifier provides S Low Quiescent Current: 2.0mA at 3.7V, 2.7mA Class AB audio performance with Class D efficiency. at 5V This device offers five selectable gain settings (6dB, S Spread Spectrum and Active Emissions Limiting 9dB, 12dB, 15dB, and 18dB) set by a single gain-select S Five Pin-Selectable Gains input (GAIN). S Click-and-Pop Suppression Active emissions limiting, edge-rate, and overshoot con- trol circuitry greatly reduces EMI. A filterless spread- S Thermal and Overcurrent Protection spectrum modulation scheme eliminates the need for S Low-Current Shutdown Mode output filtering found in traditional Class D devices. These S Space-Saving, 1.68mm x 1.68mm x 0.64mm, features reduce application component count. 16-Bump WLP (0.4mm Pitch) The IC s 2.0mA at 3.7V, 2.7mA at 5V, quiescent current extends battery life in portable applications. Ordering Information The IC is available in a 16-bump WLP (1.68mm x 1.68mm x 0.64mm) package specified over the extended -40NC TEMP PIN- TOP PART to +85NC temperature range. RANGE PACKAGE MARK -40NC to Applications MAX98303EWE+ 16 WLP AAA +85NC Notebook and Netbook MP3 Players +Denotes a lead(Pb)-free/RoHS-compliant package. Computers Portable Audio Players Tablets VoIP Phones Cellular Phones Typical Application Circuit +2.6V TO +5.5V 10F 0.1F PVDD 1F INL+ OUTL+ 1F INL- OUTL- PVDD GAIN GAIN CONTROL 1F INR+ OUTR+ 1F OUTR- INR- PVDD MAX98303 SHDN PGND Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. EVALUATION KIT AVAILABLEStereo 3.1W Class D Amplifier ABSOLUTE MAXIMUM RATINGS PVDD to PGND ........................................................-0.3V to +6V Continuous Power Dissipation for Multilayer Board (T = +70NC) A 16-Bump WLP (derate 17.2mW/NC above +70NC) ........1.38W OUT +, OUT - to PGND .......................-0.3V to (V + 0.3V) PVDD All Other Pins to PGND ...........................................-0.3V to +6V B (Note 1) ..................................................................58NC/W JA Continuous Current for PVDD, PGND, B (Note 1) .................................................................15NC/W JC OUTL , OUTR ........................................................Q1600mA Junction Temperature .....................................................+150NC Continuous Input Current (all other pins) ........................Q20mA Operating Temperature Range .......................... -40NC to +85NC Duration of Short Circuit Between Storage Temperature Range ............................ -65NC to +150NC OUTL , OUTR to PVDD or PGND ........................Continuous Soldering Temperature (reflow) ......................................+260NC OUTL+ to OUTL-, OUTR+ to OUTR- ....................Continuous Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four- layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V = V = 3.7V, V = 0V, A = 12dB (GAIN = PVDD), R = J, R connected between OUT + to OUT -, 20Hz to 22kHz PVDD SHDN PGND V L L AC measurement bandwidth, T = T to T , unless otherwise noted. Typical values are at T = +25NC.) (Notes 2, 3) A MIN MAX A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage Range V Inferred from PSRR test 2.6 5.5 V PVDD Undervoltage Lockout UVLO 2.3 V 2.0 3.1 Quiescent Supply Current I mA DD V = 5.0V 2.7 PVDD Shutdown Supply Current I V = 0V, T = +25NC 0.1 10 FA SHDN SHDN A Turn-On Time t 3.4 10 ms ON Bias Voltage V 1.3 V BIAS Connect GAIN to PGND 17.5 18 18.5 Connect GAIN to PGND through 100kI 14.5 15 15.5 5% resistor Voltage Gain A Connect GAIN to PVDD 11.5 12 12.5 dB V Connect GAIN to PVDD through 100kI 8.5 9 9.5 5% resistor GAIN unconnected 5.5 6 6.5 Channel-to-Channel Gain % 0.1 Tracking A = 18dB 15 20 29 V A = 15dB 15 20 29 V Input Resistance R A = 12dB 15 20 29 kI IN V A = 9dB 20 28 40 V A = 6dB 30 40 58 V Output Offset Voltage V T = +25NC (Note 4) mV OS A 0.3 3 2 MAX98303