Evaluates: MAX5135/MAX11040/MAX11612 19-5283 Rev 0 5/10 MAXSPCSPARTAN6+ Evaluation Kit General Description Features The MAXSPCSPARTAN6+ evaluation kit (EV kit) is S 12-Bit, 2-/4-Channel, SAR ADC Support designed to facilitate the use of Maxim ADCs and DACs (MAX11612) M M with any evaluation board made for Xilinx Spartan S 24-Bit, 4-Channel, Programmable Data Rate, 6 series FPGAs. The EV kit contains the MAX11612 and Sigma-Delta ADC Support (MAX11040) MAX11040 ADCs and two cascaded MAX5135 DACs. S 12-Bit, 4-Channel DAC Support (MAX5135) The MAX11612 is a very-low-power, 4-channel, 2-wire, S Connects with any Spartan 6 Evaluation Boards 12-bit, SAR ADC. This ADC operates with a 5V supply and has an internal reference of 4.096V. Through a Standard FMC VITA-57.1 LPC Connector The MAX11040 is an SPIK-compatible, 4-channel, Ordering Information simultaneous-sampling, cascadable, 24-bit, sigma-delta ADC. The MAX5135 is the industrys smallest, 12-bit, PART TYPE voltage-output DAC. MAXSPCSPARTAN6+ EV Kit +Denotes lead(Pb)-free and RoHS compliant. Component List DESIGNATION QTY DESCRIPTION DESIGNATION QTY DESCRIPTION L1 1 10FH Q5% inductor (0603, 0) 10FF Q20%, 25V ceramic C1 1 capacitor (1206) R1, R2, R16, 4 2.2kI Q5% resistors (0603) R17 C2, C3, R3R10 8 49.9I Q0.1% resistors (0603) C11C14, 0.1FF Q10%, 50V ceramic 16 C21C26, capacitors (0603) R11R14 4 100I Q1% resistors (0603) C29C32 R15, R21R24 5 4.7kI Q0.1% resistors (0603) R18, R19, R20 3 0I Q1% resistors (0603) C4, C15C20, 1FF Q10%, 25V ceramic 9 C27, C28 capacitors (0603) Step-down converter (6 SOT23) U1 1 Maxim MAX1837EUT50 G16 18pF Q5%, 50V C0G ceramic C5, C6 2 capacitors (0603) M Low-power ADC (8 FMAX ) U2 1 Maxim MAX11612EUA+ 0.01FF Q5%, 25V ceramic C7C10 4 capacitors (0603) Sigma-delta ADC (38 TSSOP) U3 1 Maxim MAX11040GUU+ 47pF, 50V ceramic capacitors C33, C34 2 (0603) Bidirectional level translator U4 1 (12 TQFN-EP*) 4.7FF Q10%, 10V ceramic C35, C36 2 Maxim MAX3395EETC+ capacitors (0603) D1, D2 2 Orange SMT LEDs (0603) 8-channel level translator D3, D4, D5 3 Green SMT LEDs (0603) U5 1 (20 TSSOP) Maxim MAX3002EUP J1 1 FMC LPC connector (VITA-57.1) J2 1 8 x 2-pin R/A header (2.54mm) Quad 12-bit DACs (24 TQFN-EP*) U6, U7 2 Maxim MAX5135GTG+ J3, J4 2 8 x 2-pin headers (2.54mm) Y1 1 24.576MHz, 18pF crystal 8-pin inline receptacle, 0.1in J5 1 centers 1 PCB: MAXSPCSPARTAN6+ J6, J7 2 3-pin headers (2.54mm) *EP = Exposed pad. Xilinx and Spartan are registered trademarks of Xilinx. SPI is a trademark of Motorola, Inc. MAX is a registered trademark of Maxim Integrated Products, Inc. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.MAXSPCSPARTAN6+ Evaluation Kit Table 1. MAXSPCSPARTAN6+ Connector Quick Start J2 Description The MAXSPCSPARTAN6+ board can be plugged in to any Spartan 6 series FPGA evaluation board. A two-step J2 PIN NO. LABEL FUNCTION configuration is needed to use this card with the FPGA +5V, 250mA supply for external 1 +5V evaluation board: circuit 1) Place a shunt on pins 2-3 of header J7 2 N.C. Not connected (i.e., +3V3FMC to +3V3). 3 GND Ground 2) Place a shunt on pins 2-3 of header J6 DAC output from channel 0 of U6 4 DA0 (i.e., +5VREG to +5V). (MAX5135) Now connect the MAXSPCSPARTAN6+ board to the 5 GND Ground FPGA EV kit. On power-up, LEDs D3, D4, and D5 should DAC output from channel 1 of U6 6 DA1 glow, indicating a power-up state. (MAX5135) 7 GND Ground Detailed Description of Hardware DAC output from channel 2 of U6 The MAXSPCSPARTAN6+ board is loaded with Maxims 8 DA2 (MAX5135) ADCs and DACs and makes it very easy to integrate the FPGA with any analog interface. 9 GND Ground DAC output from channel 3 of U6 Communication with the MAX11612 10 DA3 (MAX5135) 2 The MAX11612 is a 12-bit, 2-/4-channel, I C-compatible ADC input to channel 1 of U2 ADC. The FPGA can drive commands for data 11 AD1 2 (MAX11612) acquisition from the MAX11612 on the I C slave address 0110100. The MAX11612 can work with the internal ADC input to channel 0 of U2 12 AD0 reference of 4.096V or the external reference connected (MAX11612) at the AD3 port of J2. If internal reference is used all 13 GND Ground 4 channels can be sampled from AD0AD3. For more Digital input/output connected to information, refer to the MAX11612 IC data sheet. 14 I/O FMC connector at C18 Communication with the MAX11040 ADC input to channel 3 of U2 15 AD3 The MAX11040 is a 24-bit, 4-channel, SPI-compatible, (MAX11612) sigma-delta ADC with programmable output data rate. ADC input to channel 2 of U2 16 AD2 It has an internal reference of 2.5V with Q2.2V input (MAX11612) range. Input ports are marked as AD0-/AD0+ to AD3-/ AD3+ on J3. External reference can also be applied. The MAX11040 does simultaneous sampling and data for all 4 channels and can be acquired in one read. This ADC has four standard connections for SPI communication. It also has an extra signal (DRDYOUT) that interrupts the FPGA at every end-of-conversion to sample the data. For more information, refer to the MAX11040 IC data sheet. Communication with the MAX5135 The MAX5135 is a 12-bit, 4-channel, voltage output, SPI-compatible DAC. The MAXSPCSPARTAN6+ board contains two MAX5135 ICs in a cascaded configura- tion. The DAC channels are marked as DA0DA3 on J2 and DA4DA7 on J3. For more information, refer to the MAX5135 IC data sheet. 2 Evaluates: MAX5135/MAX11040/MAX11612