Precision JFET, High Speed, Dual Operational Amplifier Data Sheet OP249 FEATURES PIN CONFIGURATIONS Slew rate: 22 V/s typical OUT A 1 8 V+ OP249 Settling time (0.01%): 1.2 s maximum A IN A 2 7 OUT B Offset voltage: 200 V typical B +IN A 3 6 IN B Open-loop gain: 1000 V/mV minimum V 4 5 +IN B Total harmonic distortion: 0.002% typical Figure 1. 8-Lead CERDIP (Q-8) and 8-Lead PDIP (N-8) APPLICATIONS +IN A 1 8 IN A Output amplifier for fast DACs 2 A 7 OUT A V Signal processing 3 6 +IN B V+ OP249 Instrumentation amplifiers 5 IN B 4 B OUT B Fast sample-and-holds Active filters Figure 2. 8-Lead SOIC (R-8) Low distortion audio amplifiers Input buffer for ADCs Servo controllers GENERAL DESCRIPTION The OP249 is a high speed, precision dual JFET op amp, similar Symmetrical slew rate, even when driving large load, such as, to the popular single op amp. The OP249 outperforms available 600 or 200 pF of capacitance and ultralow distortion, make dual amplifiers by providing superior speed with excellent dc the OP249 ideal for professional audio applications, active filters, performance. Ultrahigh open-loop gain (1 kV/mV minimum), high speed integrators, servo systems, and buffer amplifiers. low offset voltage, and superb gain linearity makes the OP249 the industrys first true precision, dual high speed amplifier. With a slew rate of 22 V/s typical and a fast settling time of less than 1.2 s maximum to 0.01%, the OP249 is an ideal choice for high speed bipolar DAC and ADC applications. The excellent dc performance of the OP249 allows the full accuracy of high resolution CMOS DACs to be realized. 0.01 T = 25C 870ns A V = 15V S V = 10V p-p 100 O 100 90 R = 10k 90 L A = 1 V 10 10 0% 0% 10mV 500ns 5V 1s 0.001 20 100 1k 10k 20k Figure 3. Fast Settling (0.01%) Figure 4. Low Distortion, AV = 1, RL = 10 k Figure 5. Excellent Output Drive, RL = 600 Rev. I Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 19892015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 00296-003 00296-004 00296-002 00296-001 00296-005OP249 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications ....................................................................................... 1 Applications Information .............................................................. 13 Pin Configurations ........................................................................... 1 Open-Loop Gain Linearity ....................................................... 14 General Description ......................................................................... 1 Offset Voltage Adjustment ........................................................ 14 Revision History ............................................................................... 2 Settling Time ............................................................................... 14 Specifications ..................................................................................... 3 DAC Output Amplifier .............................................................. 15 Electrical Characteristics ............................................................. 3 Discussion on Driving ADCs ................................................... 16 Absolute Maximum Ratings ............................................................ 6 Outline Dimensions ....................................................................... 17 ESD Caution .................................................................................. 6 Ordering Guide .......................................................................... 18 REVISION HISTORY 10/15Rev. H to Rev. I 9/01Rev. D to Rev. E Changes to Features Section............................................................ 1 Edits to Features and Pin Connections .......................................... 1 Changes to Ordering Guide ............................................................ 8 Edits to Electrical Characteristics .............................................. 2, 3 Deleted Table 7 .................................................................................. 8 Edits to Absolute Maximum Ratings, Package Type, and Ordering Guide ..................................................................................4 11/13Rev. G to Rev. H Deleted Wafer Test Limits and Dice Characteristics Section ...... 5 Changes to Figure 39 and Figure 41 ............................................. 13 Edits to Typical Performance Characteristics ................................ 8 Edits to Macro-Model Figure ........................................................ 15 Edits to Outline Dimensions......................................................... 17 4/10Rev. F to Rev. G Changes to Features Section and General Description Section . 1 Changes to Offset Voltage Parameter, Table 1 .............................. 3 Deleted Long Term Offset Voltage Parameter and Note 1, Table 1 ................................................................................... 3 Changes to Offset Voltage Parameter, Offset Voltage Temperature Coefficient Parameter, and Note 1, Table 3 ........... 5 Delete OP249F Columns, Table 3................................................... 5 Changes to Offset Voltage Parameter and Offset Voltage Temperature Coefficient Parameter, Table 4 ................................. 5 Inserted OP249F Columns, Table 4 ............................................... 5 Changes to Discussion on Driving ADCs Section ..................... 16 Deleted Figure 52 and Figure 53 ................................................... 17 5/07Rev. E to Rev. F Updated Format .................................................................. Universal Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Table 3 and Table 4 ....................................................... 5 Changes to Table 5 ............................................................................ 6 Changes to Figure 31 ...................................................................... 11 Changes to Figure 37 and Figure 38 ............................................. 12 Deleted OP249 SPICE Macro-Model Section ............................ 14 Deleted Figure 18 Renumbered Sequentially............................. 14 Deleted Table I ................................................................................ 15 Changes to Discussion on Driving ADCs Section ..................... 17 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 19 Rev. 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