Dual/Quad, Low Power, High Speed JFET Operational Amplifiers Data Sheet OP282/OP482 FEATURES PIN CONNECTIONS High slew rate: 9 V/s OUT A 1 8 V+ Wide bandwidth: 4 MHz IN A 2 7 OUT B OP282 Low supply current: 250 A/amplifier maximum IN B +IN A 3 6 Low offset voltage: 3 mV maximum 4 +IN B V 5 OP-482 Low bias current: 100 pA maximum Fast settling time Figure 1. 8-Lead, Narrow-Body SOIC (S-Suffix) R-8 Common-mode range includes V+ OUT A 1 8 V+ Unity-gain stable OP282 IN A 2 7 OUT B 14-ball wafer level chip scale for quad TOP VIEW +IN A 3 6 IN B (Not to Scale) V 4 5 +IN B APPLICATIONS Figure 2. 8-Lead MSOP RM-8 Active filters Fast amplifiers OUT A 1 14 OUT D Integrators IN A 2 13 IN D Supply current monitoring + + 3 12 +IN D +IN A GENERAL DESCRIPTION OP482 V+ 4 11 V The OP282/OP482 dual and quad operational amplifiers feature +IN C +IN B 5 10 excellent speed at exceptionally low supply currents. The slew + + IN C IN B 6 9 rate is typically 9 V/s with a supply current of less than 250 A OUT B OUT C 7 8 per amplifier. These unity-gain stable amplifiers have a typical Figure 3. 14-Lead PDIP (P-Suffix) N-14 gain bandwidth of 4 MHz. The JFET input stage of the OP282/OP482 ensures that the bias OUT A 1 14 OUT D current is typically a few picoamps and is less than 500 pA over IN A 2 13 IN D the full temperature range. The offset voltage is less than 3 mV +IN D +IN A 3 12 for the dual amplifier and less than 4 mV for the quad amplifier. V+ 4 OP482 11 V With a wide output swing (within 1.5 V of each supply), low +IN B +IN C 5 10 power consumption, and high slew rate, the OP282/OP482 are IN B IN C 6 9 ideal for battery-powered systems or power-restricted applica- OUT B OUT C 7 8 tions. An input common-mode range that includes the positive Figure 4. 14-Lead, Narrow-Body SOIC (S-Suffix) R-14 supply makes the OP282/OP482 an excellent choice for high- side signal conditioning. BALL A1 CORNER 1 2 3 The OP282/OP482 are specified over the extended industrial OUT D OUT A IN D temperature range. The OP282 is available in the standard A 8-lead, narrow SOIC and MSOP packages. The OP482 is B +IN D IN A +IN A available in the PDIP and narrow SOIC packages, as well as C a 14-ball WLCSP. V+ D V +IN B E F +IN C IN B IN C G OUT C OUT B H J TOP VIEW (BALL SIDE DOWN) Not to Scale Figure 5. 14-Ball WLCSP CB-14-2 Rev. I Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 19912013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 00301-048 00301-002 00301-004 00301-001 00301-003OP282/OP482 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................4 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................5 General Description ......................................................................... 1 Applications Information .............................................................. 12 Pin Connections ............................................................................... 1 High-Side Signal Conditioning ................................................ 12 Revision History ............................................................................... 2 Phase Inversion ........................................................................... 12 Specifications ..................................................................................... 3 Active Filters ............................................................................... 12 Electrical Characteristics ............................................................. 3 Programmable State Variable Filter ......................................... 13 Absolute Maximum Ratings ............................................................ 4 Outline Dimensions ....................................................................... 14 Thermal Resistance ...................................................................... 4 Ordering Guide .......................................................................... 16 REVISION HISTORY 9/13Rev. H to Rev. I Added Figure 5 through Figure 20 Renumbered Successive Figures .............................................................................. 5 Changes to Figure 5 .......................................................................... 1 Updated Figure 21 and Figure 22 .................................................... 7 Updated Outline Dimensions ....................................................... 14 Updated Figure 23 and Figure 27 .................................................... 8 Changes to Ordering Guide .......................................................... 16 Updated Figure 29 ............................................................................. 9 9/10Rev. G to Rev. H Updated Figure 35 and Figure 36 ................................................. 10 Added WLCSP .................................................................... Universal Updated Figure 43 .......................................................................... 11 Changes to Features Section............................................................ 1 Changes to Applications Information ......................................... 12 Changes to General Description Section ...................................... 1 Changes to Figure 44 ...................................................................... 12 Added Figure 5 Renumbered Sequentially .................................. 1 Deleted OP282/OP482 Spice Macro Model Section .................... 9 Changes to Large-Signal Voltage Gain Parameter, Table 1 ......... 3 Deleted Figure 4 ................................................................................. 9 Changes to Table 2, Thermal Resistance Section, and Table 3 ... 4 Deleted OP282 Spice Marco Model ............................................. 10 Change to Figure 30 ......................................................................... 9 Updated Outline Dimensions ....................................................... 14 Added Figure 53 .............................................................................. 16 Changes to Ordering Guide .......................................................... 14 Changes to Ordering Guide .......................................................... 16 10/02Rev. D to Rev. E 7/08Rev. F to Rev. G Edits to 8-Lead Epoxy DIP (P-Suffix) Pin ...................................... 1 Edits to Ordering Guide ................................................................... 3 Changes to Phase Inversion Section ............................................ 12 Edits to Outline Dimensions ......................................................... 11 Deleted Figure 45 ............................................................................ 12 Added Figure 45 and Figure 46..................................................... 12 9/02Rev. C to Rev. D Updated Outline Dimensions ....................................................... 14 Edits to 14-Lead SOIC (S-Suffix) Pin ............................................. 1 Changes to Ordering Guide .......................................................... 16 Replaced 8-Lead SOIC (S-Suffix) ................................................. 11 10/04Rev. E to Rev. F 4/02Rev. B to Rev. C Deleted 8-Lead PDIP ......................................................... Universal Wafer Test Limits Deleted ................................................................ 2 Added 8-Lead MSOP ......................................................... Universal Edits to Absolute Maximum Ratings .............................................. 3 Changes to Format and Layout ......................................... Universal Dice Characteristics Deleted ............................................................ 3 Changes to Features .......................................................................... 1 Edits to Ordering Guide ................................................................... 3 Changes to Pin Configurations ....................................................... 1 Edits to Figure 1 ................................................................................. 7 Changes to General Description .................................................... 1 Edits to Figure 3 ................................................................................. 8 Changes to Specifications ................................................................ 3 20-Position Chip Carrier (RC Suffix) Deleted ........................... 11 Changes to Absolute Maximum Ratings ....................................... 4 Changes to Table 3 ............................................................................ 4 Rev. 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