Filterless, High Efficiency, Mono 2.8 W, Class-D Audio Amplifier Data Sheet SSM2305 The SSM2305 features a high efficiency, low noise modulation FEATURES scheme that does not require external LC output filters. The modu- Filterless Class-D amplifier with - modulation lation provides high efficiency even at low output power. The No sync necessary when using multiple Class-D amplifiers SSM2305 operates with 90% efficiency at 1.3 W into 8 or 83% from Analog Devices, Inc. efficiency at 2.2 W into 4 from a 5.0 V supply and has an SNR of 2.8 W into 4 load and 1.6 W into 8 load at 5.0 V supply >98 dB. Spread-spectrum pulse density modulation is used to with <10% total harmonic distortion (THD) provide lower EMI-radiated emissions compared with other 89% efficiency at 5.0 V, 1.3 W into 8 speaker Class-D architectures. >98 dB signal-to-noise ratio (SNR) Single-supply operation from 2.5 V to 5.5 V The SSM2305 has a micropower shutdown mode with a maximum 20 nA ultralow shutdown current shutdown current of 30 nA. Shutdown is enabled by applying Short-circuit and thermal protection SD a Logic 0 to the pin. The device also includes pop-and-click Available in 8-lead, 3 mm 3 mm LFCSP and MSOP suppression circuitry. This minimizes voltage glitches at the Pop-and-click suppression output during turn-on and turn-off, thus reducing audible noise Built-in resistors reduce board component count on activation and deactivation. Fixed and user-adjustable gain configurations The fully differential input of the SSM2305 provides excellent APPLICATIONS rejection of common-mode noise on the input. Input coupling Mobile phones capacitors can be omitted if the dc input common-mode voltage MP3 players is approximately VDD/2. Portable gaming Portable electronics The SSM2305 has excellent rejection of power supply noise, Educational toys including noise caused by GSM transmission bursts and RF rectification. PSRR is typically 60 dB at 217 Hz. GENERAL DESCRIPTION The default gain of the SSM2305 is 18 dB, but users can reduce the The SSM2305 is a fully integrated, high efficiency, Class-D gain by using a pair of external resistors. audio amplifier designed to maximize performance for mobile phone applications. The application circuit requires a minimum The SSM2305 is specified over the commercial temperature range of external components and operates from a single 2.5 V to 5.5 V (40C to +85C). It is available in both an 8-lead, 3 mm 3 mm supply. It is capable of delivering 2.2 W of continuous output lead frame chip scale package (LFCSP) and an 8-lead mini small power with less than 1% THD + N driving a 4 load from a outline package (MSOP). 5.0 V supply. It has built-in thermal shutdown and output short- circuit protection. FUNCTIONAL BLOCK DIAGRAM 0.1F 10F VBATT 2.5V TO 5.5V VDD SSM2305 296k 47nF* 37k IN+ OUT+ AUDIO IN+ MODULATOR FET 37k (-) DRIVER IN OUT AUDIO IN 47nF* 296k SD INTERNAL POP/CLICK BIAS SHUTDOWN OSCILLATOR SUPPRESSION GND *INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY V /2. DD Figure 1. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 07243-001SSM2305 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 11 Applications ....................................................................................... 1 Overview ..................................................................................... 11 General Description ......................................................................... 1 Gain .............................................................................................. 12 Functional Block Diagram .............................................................. 1 Pop-and-Click Suppression ...................................................... 12 Revision History ............................................................................... 2 Output Modulation Description .............................................. 12 Specif icat ions ..................................................................................... 3 Layout .......................................................................................... 12 Absolute Maximum Ratings ............................................................ 4 Input Capacitor Selection .......................................................... 12 Thermal Resistance ...................................................................... 4 Proper Power Supply Decoupling ............................................ 13 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 14 Pin Configurations and Function Descriptions ........................... 5 Ordering Guide .......................................................................... 14 Typical Performance Characteristics ............................................. 6 REVISION HISTORY 5/2016Rev. A to Rev. B Changed CP-8-2 to CP-8-13 ........................................ Throughout Changes to Figure 2 and Table 4 ..................................................... 5 Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 14 7/2008Rev. 0 to Rev. A Changes to Figure 1 .......................................................................... 1 Change to Shutdown Current Parameter, Table 1 ........................ 3 Change to Differential Input Impedance Parameter, Table 1 ..... 3 Added Exposed Pad Notation to Figure 2 ..................................... 5 Change to Figure 24 ......................................................................... 9 Changes to Figure 32 and Figure 33 ............................................. 11 Changes to Gain Section ................................................................ 12 Updated Outline Dimensions ....................................................... 14 3/2008Revision 0: Initial Version Rev. B Page 2 of 16