2, 31.76 W, Digital Input, Filterless Stereo Class-D Audio Amplifier Data Sheet SSM3582 FEATURES Supported sample rates from 8 kHz to 192 kHz 24-bit resolution Digital input stereo, high efficiency Class-D amplifier Multiple PCM audio serial data formats Operates from a single 4.5 V to 16 V supply TDM slave with support for up to 16 devices on a single bus State-of-the-art, proprietary, filterless - modulation 2 I S or left justified slave 106.5 dB signal-to-noise ratio Adjustable full-scale output tailored for many PVDD sources 0.004% total harmonic distortion plus noise (THD + N) 2- and 3-cell Li-Ion batteries at 5 W into 8 Digital volume control with selectable smooth ramp 38.5 V rms A weighted output noise Automatic power-down function Pop/clickless on/off sequence Supply monitoring automatic gain control (AGC) function 2 14.67 W output at 12 V supply to 4 loads at <1% THD + N reduces system brownout 2 14.4 W output at 16 V supply to 8 loads at <1% THD + N 2 Standalone operational mode without I C Mono mode for increased maximum output power 2 Temperature sensor with 1C step readout via I C 1 49.69 W output at 16 V supply to 2 l oads at <1% THD + N Short-circuit, undervoltage, and thermal protection Support for low impedance loads Thermal early warning As low as 3 /5 H in stereo mode Power-on reset As low as 2 /5 H in mono mode PVDD sensing ADC High power efficiency 40-lead, 6 mm 6 mm LFCSP with thermal pad 93.8% efficiency into an 8 load 90.6% efficiency into a 4 load APPLICATIONS 12.34 mA quiescent current with single 12 V PV supply DD Mobile computing Single supply operation with internal LDOs or option to use All in one computers an external 5 V and 1.8 V supply for lowest power Portable electronics consumption Wireless speakers 2 I C control and hardware modes with up to 16 pin-selectable Televisions slots/addresses FUNCTIONAL BLOCK DIAGRAM DVDD DVDD EN AVDD AVDD EN PVDD SDA DVDD AVDD SCL 2 I C PVDD TEMPERATURE CONTROL ADC SENSOR ADDR0 1.8V LDO 5V LDO ADDR1 OUTL+ THREE-LEVEL BSTL+ FULL BRIDGE - DAC POWER STAGE BSTL MODULATOR OUTL VOLUME BLCK 2 I S FSYNC TDM BATTERY INTERFACE SDATA AGC OUTR+ THREE-LEVEL BSTR+ FULL BRIDGE DAC - POWER STAGE BSTR MODULATOR OUTR SSM3582 AGND PGND Figure 1. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13399-001SSM3582 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Standalone Operation ................................................................ 30 Applications ....................................................................................... 1 Mono Mode ................................................................................. 31 Functional Block Diagram .............................................................. 1 Analog and Digital Gain ........................................................... 31 Revision History ............................................................................... 2 Pop and Click Suppression ........................................................ 31 General Description ......................................................................... 3 Temperature Sensor ................................................................... 31 Specifications ..................................................................................... 4 Faults and Limiter Status Reporting ........................................ 32 Digital Input/Output Specifications........................................... 8 VBAT (PVDD) Sensing ................................................................ 32 Digital Timing Specifications ..................................................... 8 Limiter and Battery Tracking Threshold Control .................. 32 Digital Input Timing Specifications ........................................... 8 High Frequency Clipper ............................................................ 35 Absolute Maximum Ratings .......................................................... 11 EMI Noise .................................................................................... 35 Thermal Resistance .................................................................... 11 Output Modulation Description .............................................. 35 ESD Caution ................................................................................ 11 Bootstrap Capacitors.................................................................. 36 Pin Configuration and Function Descriptions ........................... 12 Power Supply Decoupling ......................................................... 36 Typical Performance Characteristics ........................................... 14 Output EMI Filtering ................................................................. 36 Theory of Operation ...................................................................... 25 PCB Placement ........................................................................... 36 Overview ...................................................................................... 25 Layout .......................................................................................... 37 Power Supplies ............................................................................ 25 Register Summary .......................................................................... 38 Power-Up Sequence ................................................................... 26 Register Details ............................................................................... 39 Power-Down Operation ............................................................ 26 Typical Application Circuit ........................................................... 57 Clocking ....................................................................................... 26 Outline Dimensions ....................................................................... 59 Digital Audio Serial Interface ................................................... 26 Ordering Guide .......................................................................... 59 REVISION HISTORY 5/2019Rev. 0 to Rev. A Changes to Address: 0x04, Reset: 0xA1, Name: POWER CTRL Section and Table 28 ....................................................................... 40 4/2016Revision 0: Initial Version Rev. A Page 2 of 59