Digital 2.5 W, 5.1 V, Boost Class-D Audio Amplifier with Output Sensing Data Sheet SSM4567 FEATURES Output noise: 21.7 V rms, A-weighted THD + N: 0.025% at 1 kHz, 500 mW output power Filterless Class-D amplifier with spread-spectrum - PSSR: 90 dB at 217 Hz, with dither input modulation with integrated boost regulator (5.1 V) 72 dB signal-to-noise ratio (SNR) on output current sensing Digitized output of output voltage, output current, and VBAT and 77 dB SNR on voltage sensing supply voltage Quiescent power consumption: 19.8 mW Integrated boost regulator Pop-and-click suppression Multiple serial data formats Flexible battery monitoring AGC PDM input/output Short-circuit protection for boost and Class-D outputs and TDM slave with support for up to 8 chips on a single bus 2 thermal protection with automatic recovery I S or left justified slave 2 2 Smart power-down when PDM stop condition Multichip I S with support for up to 4 chips on one I S bus or no clock input detected 8 kHz to 192 kHz PCM sample rates DC blocking high-pass filter and static input DC protection 2.048 to 6.14 MHz PDM input sample rates 2 for PDM input Configurable via I C control, TDM control, or PDM patterns Selectable ultralow EMI emissions and low latency modes Standalone control modes 2.5 W into 4 load and 1.42 W into 8 load at 3.6 V supply APPLICATIONS with <1% total harmonic distortion plus noise (THD + N) Mobile handsets Available in 19-ball, 1.74 mm 2.1 mm, 0.4 mm pitch WLCSP Tablets 89.7% system efficiency into 8 at 1 W, VBAT = 3.6 V Portable media players FUNCTIONAL BLOCK DIAGRAM LR SEL/ ADDR SEL BSTSW BSTSW VBST VBST SCL SDA SSM4567 BOOST (5V) DAC PDM DAT/ DAC SDATAI - FILTERING H-BRIDGE DAC CLASS-D OUTN MODULATION (5V) MOD DAC PDM CLK/ OUTP R BCLK 2 I S/TDM/ PDM INTERFACE SNS PDM DAT/ SNS SDATAO PGND V ADC SENSE SNS PDM CLK/ FSYNC I ADC SENSE IOVDD AGND VBAT Figure 1. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 12278-001SSM4567 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Integrated Boost Converter....................................................... 25 Applications ....................................................................................... 1 Applications Information .............................................................. 26 Functional Block Diagram .............................................................. 1 Component Selection for Boost Regulators ............................... 26 Table of Contents .............................................................................. 2 Layout .......................................................................................... 26 Revision History ............................................................................... 3 Power Supply Decoupling ......................................................... 27 General Description ......................................................................... 4 Typical Application Circuits ......................................................... 28 2 Specifications ..................................................................................... 5 Software Control Mode, I S/TDM Interface........................... 28 Digital Input/Output .................................................................... 6 Software Control Mode, PDM Interface ................................. 29 2 Absolute Maximum Ratings ............................................................ 7 Standalone Mode, I S/TDM Interface ..................................... 30 Thermal Resistance ...................................................................... 7 Pattern Control Mode, PDM Interface .................................... 31 ESD Caution .................................................................................. 7 Register Summary .......................................................................... 32 Pin Configuration and Function Descriptions ............................. 8 Register Details ............................................................................... 33 Typical Performance Characteristics ............................................. 9 Power Control Register.............................................................. 33 Theory of Operation ...................................................................... 15 Amp and Sense Control Register ............................................. 34 Modes of Operation ................................................................... 15 DAC Control Register ................................................................ 35 Clocking ....................................................................................... 15 DAC Volume Control Register ................................................. 36 Power Supplies ............................................................................ 15 Serial Audio Interface Control 1 Register ............................... 37 Power Control ............................................................................. 15 Serial Audio Interface Control 2 Register ............................... 38 Power-On Reset/Voltage Supervisor ....................................... 15 Serial Audio Interface Placement 1 Control Register ............ 39 PDM Mode Setup and Control ................................................. 15 Serial Audio Interface Placement 2 Control Register ............ 40 PDM Pattern Control ................................................................. 16 Serial Audio Interface Placement 3 Control Register ............ 41 PDM Channel Selection ............................................................ 17 Serial Audio Interface Placement 4 Control Register ............ 42 PCM Mode Pin Setup and Control .......................................... 17 Serial Audio Interface Placement 5 Control Register ............ 43 PCM Digital Audio Serial interface ......................................... 17 Serial Audio Interface Placement 6 Control Register ............ 43 Serial Data Placement ................................................................ 17 Battery Voltage Output Register ............................................... 44 2 Stereo (I S/Left Justified) Operating Mode ............................. 19 Limiter Control 1 Register ........................................................ 44 Right Justified Data .................................................................... 19 Limiter Control 2 Register ........................................................ 45 TDM Operating Mode ............................................................... 19 Limiter Control 3 Register ........................................................ 46 2 Multichip I S Operating Mode ................................................. 20 Status 1 Register .......................................................................... 47 System Gain ................................................................................. 20 Status 2 Register .......................................................................... 47 Output Current Sensing ............................................................ 21 Fault Control Register ................................................................ 48 Output Voltage Sensing ............................................................. 21 PDM Control Register ............................................................... 49 VBAT Sensing ............................................................................. 21 MCLK Ratio Setting Register ................................................... 49 Limiter and Battery Tracking Threshold Control .................. 21 Boost Control 1 Register ........................................................... 50 2 I C Control .................................................................................. 22 Boost Control 2 Register ........................................................... 51 TDM Control Interface .............................................................. 24 Soft Reset Register ...................................................................... 51 Standalone Mode Control ......................................................... 24 Outline Dimensions ....................................................................... 52 EMI Noise .................................................................................... 24 Ordering Guide .......................................................................... 52 Output Modulation Description .............................................. 24 Rev. 0 Page 2 of 52