Not Recommended For New Designs bq2040 Gas Gauge IC With SMBus Interface The bq2040 estimates battery self- Features General Description discharge based on an internal timer and temperature sensor and Provides accurate measurement The bq2040 Gas Gauge IC With user-programmable rate informa- of available charge in NiCd, SMBus Interface is intended for tion stored in external EEPROM. NiMH, and Li-Ion batteries battery-pack or in-system installa- The bq2040 also automatically re- tion to maintain an accurate record calibrates or learns battery capac- Supports SBS v1.0 data set and of available battery charge. The ity in the full course of a discharge two-wire interface bq2040 directly supports capacity cycle from full to empty. monitoring for NiCd, NiMH, and Li- Monitors charge FET in Li-Ion Ion battery chemistries. The bq2040 may operate directly pack protection circuit from three nickel chemistry cells. The bq2040 uses the System Man- Designed for battery pack inte- With the REF output and an exter- agement Bus v1.0 (SMBus) protocol gration nal transistor, a simple, inexpensive and supports the Smart Battery regulator can be built to provide - Low operating current Data (SBData) commands. The V for other battery cell configu- CC bq2040 also supports the SBData - Complete circuit can fit on less rations. charge control functions. Battery than square inch of PCB state-of-charge, remaining capacity, space An external EEPROM is used to remaining time, and chemistry are program initial values into the Supports SBS charge control available over the serial link. bq2040 and is necessary for proper commands for NiCd, NiMH, and Battery-charge state can be directly operation. Li-Ion indicated using a four-segment LED display to graphically depict battery Drives a four-segment LED dis- full-to-empty in 25% increments. play for remaining capacity indication 16-pin narrow SOIC Pin Connections Pin Names SB Battery sense input V 3.06.5V CC PSTAT Protector status input V 1 16 V ESCL EEPROM clock CC OUT SMBD SMBus data input/output ESDA EEPROM data ESCL 2 15 REF LED LED segment 1-4 SMBC SMBus clock ESDA 3 14 SMBC 1-4 V System ground REF Voltage reference output SS LED 4 13 SMBD 1 V EEPROM supply output SR Sense resistor input OUT LED 5 12 PSTAT 2 DISP Display control input LED 6 11 SB 3 LED 7 10 DISP 4 V 8 9 SR SS 16-Pin Narrow SOIC PN204001.eps SLUS005JUNE 1999 E 1Not Recommended For New Designs bq2040 DISP Display control input Pin Descriptions DISP high disables the LED display. DISP V Supply voltage input CC floating allows the LED display to be active during charge if the rate is greater than ESCL Serial memory clock 100mA. DISP low activates the display for 4 seconds. Output used to clock the data transfer be- tween the bq2040 and the external non- SB Secondary battery input volatile configuration memory. Monitors the pack voltage through a high- ESDA Serial memory data and address impedance resistor divider network. The pack voltage is reported in the SBD register Bidirectional pin used to transfer address function Voltage (0x09) and is monitored for and data to and from the bq2040 and the ex- end-of-discharge voltage and charging volt- ternal nonvolitile configuration memory. age parameters. LED display segment outputs LED1 PSTAT Protector status input LED 4 Each output may drive an external LED. Provides overvoltage status from the Li-Ion protector circuit and can initiate a charge sus- V Ground SS pend request. SR Sense resistor input SMBus data SMBD The voltage drop (V ) across pins SR and SR Open-drain bidirectional pin used to transfer V is monitored and integrated over time SS address and data to and from the bq2040. to interpret charge and discharge activity. The SR input is connected to the sense re- SMBC SMBus clock sistor and the negative terminal of the battery. V <V indicates discharge, and SR SS Open-drain bidirectional pin used to clock V >V indicates charge. The effective SR SS the data transfer to and from the bq2040. voltage drop, V , as seen by the bq2040 SRO is V +V . (See Table 3.) REF Reference output for regulator SR OS REF provides a reference output for an op- tional FET-based micro-regulator. V Supply output OUT Supplies power to the external EEPROM con- figuration memory. 2