TISP4360H3BJ BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS TISP4360H3BJ Overvoltage Protector Series Matched to FCC Part 68 POTS + ADSL Voltages SMBJ Package (Top View) Working Voltage, V . 290 V DRM Protection Voltage, V 360 V (BO) High FCC, Bellcore & ITU-T Surge Ratings 12 R(B) T(A) I TSP Waveshape Standard A MDXXBG 2/10 s GR-1089-CORE 500 8/20 s IEC 61000-4-5 300 10/160 s FCC Part 68 250 Device Symbol ITU-T K.20/21 10/700 s 200 T FCC Part 68 10/560 s FCC Part 68 160 10/1000 s GR-1089-CORE 100 High UL 1950, Bellcore & ITU-T AC Capability SD4XAA Applied AC 4360 I Limit T(OV)M Standard R A r.m.s. s 40 0.04 Terminals T and R correspond to the UL 1950 alternative line designators of A and B 7 4.2 (ANNEX NAC) 2.2 SURVIVES Large creepage distance ............................... 2.54 mm (0.1 in.) 60 0.015 30 0.08 Low Capacitance ................................................... 24 pF 50 V GR-1089-CORE 15 0.48 70 pF 0 2.2 SURVIVES 23 0.15 .............................................. UL Recognized Component ITU-T K.20/21 1 SURVIVES Description The TISP4360H3BJ is designed to limit overvoltages on equipment used for telephone lines carrying POTS (Plain Old Telephone System) and ADSL (Asymmetrical Digital Subscriber Line) signals. TISP4360H3BJ a.c. overload limits are specified for designers to select the correct overcurrent protectors to meet safety requirements, e.g. UL 1950. The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping. If sufficient current is available from the overvoltage, the breakdown voltage will rise to the breakover level, which causes the device to switch into a low-voltage on-state condition. This switching action removes the high voltage stress from the following circuitry and causes the current resulting from the overvoltage to be safely diverted through the protector. The high holding (switch off) current helps prevent d.c. latchup as the diverted current subsides. The TISP4360H3BJ is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. This high (H) current protection device is in a plastic SMBJ package (JEDEC DO-214AA with J-bend leads) and supplied in embossed carrier reel pack. For alternative voltage and holding current values, consult the factory. How To Order Device Package Carrier Order As TISP4360H3BJ BJ (J-Bend DO-214AA/SMB) Embossed Tape Reeled TISP4360H3BJR-S JUNE 1999 - REVISED JANUARY 2007 *RoHS Directive 2002/95/EC Jan. 27, 2003 including Annex. Specications are subject to change without notice. Users should verify actual device performance in their specic WARNING Cancer and Reproductive Harm applications. The products described herein and this document are subject to specic legal disclaimers as set forth on the www.P65Warnings.ca.gov last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. *RoHS COMPLIANT TISP4360H3BJ Overvoltage Protector Series Absolute Maximum Ratings, T = 25 C (Unless Otherwise Noted) A Rating Symbol Value Unit Repetitive peak off-state voltage, (see Note 1) V 290 V DRM Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4) 2/10 s (GR-1089-CORE, 2/10 s voltage wave shape) 500 8/20 s (IEC 61000-4-5, 1.2/50 s voltage, 8/20 current combination wave generator) 300 10/160 s (FCC Part 68, 10/160 s voltage wave shape) 250 5/200 s (VDE 0433, 10/700 s voltage wave shape) 220 I A TSP 0.2/310 s (I3124, 0.5/700 s voltage wave shape) 200 5/310 s (ITU-T K.20/21, 10/700 s voltage wave shape) 200 5/310 s (FTZ R12, 10/700 s voltage wave shape) 200 10/560 s (FCC Part 68, 10/560 s voltage wave shape) 160 10/1000 s (GR-1089-CORE, 10/1000 s voltage wave shape) 100 Non-repetitive peak on-state current (see Notes 2, 3 and 5) 20 ms (50 Hz) full sine wave 55 16.7 ms (60 Hz) full sine wave I 60 A TSM 1000 s 50 Hz/60 Hz a.c. 2.2 Maximum overload on-state current without open circuit, 50 Hz/60 Hz a.c. 0.015 s 60 0.04 s 40 0.08 s 30 I A rms T(OV)M 0.15 s 23 0.48 s 15 4.2 s 7 Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A di /dt 400 A/s T Junction temperature T -40 to +150 C J Storage temperature range T -65 to +150 C stg NOTES: 1. See Applications Information and Figure 9 for voltage values at lower temperatures. 2. Initially, the TISP4360H3BJ must be in thermal equilibrium with T =25 C. J 3. The surge may be repeated after the TISP4360H3BJ returns to its initial conditions. 4. See Applications Information and Figure 10 for current ratings at other temperatures. 5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring track widths. See Figure 7 for the current ratings at other durations. Derate current values at -0.61 %/C for ambient temperatures above 25 C. Electrical Characteristics, T = 25 C (Unless Otherwise Noted) A Parameter Test Conditions Min. Typ. Max. Unit Repetitive peak off- T = 25 C 5 A I V = V A DRM D DRM state current T = 85 C 10 A V Breakover voltage dv/dt = 750 V/ms, R = 300 360 V (BO) SOURCE dv/dt 1000 V/s, Linear voltage ramp, Impulse breakover Maximum ramp value = 500 V V 372 V (BO) voltage di/dt = 20 A/s, Linear current ramp, Maximum ramp value = 10 A I Breakover current dv/dt = 750 V/ms, R = 300 0.15 0.8 A (BO) SOURCE V On-state voltage I = 5A, t = 100 s 3V T T W I Holding current I = 5 A, di/dt = -/+ 30 mA/ms 0.225 0.8 A H T Critical rate of rise of dv/dt Linear voltage ramp, Maximum ramp value < 0.85V 5kV/s DRM off-state voltage I Off-state current V = 50 V T = 85 C 10 A D D A JUNE 1999 - REVISED JANUARY 2007 Specications are subject to change without notice. Users should verify actual device performance in their specic applications. The products described herein and this document are subject to specic legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.