TISP61521 DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS TISP61521 SLIC Protector Overvoltage Protection for High Voltage Negative Rail Agency Recognition Ringing SLICs Description Dual Voltage-Programmable Protectors UL File Number: E215609 - Supports Battery Voltages Down to -150 V - Low 3 mA max. Gate Triggering Current - High 150 mA min. Holding Current D Package (Top View) Rated for International Surge Wave Shapes 1 8 (Tip) K1 K1 (Tip) I Voltage TSP 2 7 (Gate) G A (Ground) Standard Waveshape A NC 3 6 A (Ground) 2/10 GR-1089-CORE 170 5 K2 4 K2 (Ring) (Ring) ITU-T K.22 MD6XANB 1.2/50 50 VDE 0878 NC - No internal connection Terminal typical application names shown in 1.2/50 IEC 61000-4-5 100 parenthesis 10/160 FCC Part 68 Type A 50 0.5/700 I3124 40 Device Symbol ITU-T K.20, K1 K1 10/700 VDE 0433 40 IEC 61000-4-5 9/720 FCC Part 68 Type B 40 A 10/560 FCC Part 68 Type A 35 G A 10/1000 GR-1089-CORE 30 Functional Replacements for K2 K2 Functional Device Type Package Type Replacement Terminals K1, K2 and A correspond to the alternative line designators of T, R and G or A, B and C. The LCP1511D, negative protection voltage is controlled by the 8-pin Small-Outline TISP61521DR-S LCP1521 voltage, V applied to the G terminal. SD6XAEB GG, ................................................. UL Recognized Components How To Order Device PackageCarrier Order As TISP61521 D (8-pin Small-Outline) Embossed Tape Reeled TISP61521DR-S Description The TISP61521 is a dual forward-conducting buffered p-gate overvoltage protector. It is designed to protect monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISP61521 limits voltages that exceed the SLIC supply rail voltage. The TISP61521 parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE, Issue 1 and ITU-T recommendation K.20. APRIL 2001 REVISED JULY 2019 *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their WARNING Cancer and Reproductive Harm specific applications. The products described herein and this document are subject to specific legal disclaimers as www.P65Warnings.ca.gov set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP61521 SLIC Protector Description (continued) The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -20 V to -150 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will then track the negative supply voltage and the overvoltage stress on the SLIC is minimized. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will switch into a low voltage on-state condition. As the overvoltage subsides, the high holding current of TISP61521 crowbar helps prevent d.c. latchup. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISP61521 buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The TISP61521 is available in an 8-pin plastic small-outline surface mount package. Absolute Maximum Ratings, T = 25 C (Unless Otherwise Noted) J Rating Symbol Value Unit , Repetitive peak off-state voltage, V =0 -40 C T 85 C (see Note 1) V -175 V GK J DRM , Repetitive peak gate-cathode voltage, V =0 -40 C T 85C (see Note 1) V -162 V KA J GKRM Non-repetitive peak on-state pulse current (see Note 2) 2/10 s (GR-1089-CORE, 2/10 s voltage waveshape) 170 1/20 s (K.22, VDE0878, 1.2/50 voltage waveshape) 50 8/20 s (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current) 100 10/160 s (FCC Part 68, 10/160 s voltage waveshape) 50 0.2/310 s (I3124, 0.5/700 s voltage waveshape) I 40 A TSP 5/310 s (VDE 0433, 10/700 s voltage waveshape) 40 5/310 s (ITU-T K.20/21, K.44 10/700 s voltage wave shape) 40 5/320 s (FCC Part 68, 9/720 s voltage waveshape) 40 10/560 s (FCC Part 68, 10/560 s voltage waveshape) 35 10/1000 s (GR-1089-CORE, 10/1000 s voltage waveshape) 30 Non-repetitive peak on-state current, 50 Hz (see Notes 2 and 3) 0.01 s I 15 A TSM 1s 5 Non-repetitive peak gate current, 10 ms half-sine wave, cathodes commoned (see Notes 1 and I +2 A GSM 2) Junction temperature T -40 to +150 C J Storage temperature range T -65 to +150 C stg NOTES: 1. These voltage ratings are set by the -150 V maximum supply voltage plus the 12 V diode overshoot (V ) and the 25 V SCR GKRM overshoot (V ). DRM 2. Initially, the protector must be in thermal equilibrium. The surge may be repeated after the device returns to its initial conditions. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case, the Ground terminal current will be twice the rated current value of an individual terminal pair). 3. Values for V = -48 V. For values at other voltages, see Figure 2. GG APRIL 2001 REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.