TISP7072F3DR-S Bourns

TISP7072F3,TISP7082F3 LOW-VOLTAGE TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS TISP70xxF3 (LV) Overvoltage Protector Series Patented Ion-Implanted Breakdown Region D Package (Top View) - Precise DC and Dynamic Voltages T 1 8 G V V DRM (BO) Device 7 NC 2 NU V V NC 3 6 NU 7072F3 58 72 R 45 G 7082F3 66 82 Planar Passivated Junctions NC - No internal connection. Low Off-State Current..................................<10 A NU - Non-usable no external electrical connection should be made to these pins. Rated for International Surge Wave Shapes - Single and Simultaneous Impulses Specified ratings require connection of pins 5 and 8. I TSP Waveshape Standard A Device Symbol 2/10 GR-1089-CORE 85 T R 8/20 IEC 61000-4-5 80 10/160 FCC Part 68 65 FCC Part 68 10/700 50 ITU-T K.20/21 10/560 FCC Part 68 45 10/1000 GR-1089-CORE 40 ............................................. UL Recognized Component SD7XAB G Terminals T, R and G correspond to the alternative line designators of A, B and C Description The TISP7xxxF3 series are 3-point overvoltage protectors designed for protecting against metallic (differential mode) and simultaneous longitudinal (common mode) surges. Each terminal pair has the same voltage limiting values and surge current capability. This terminal pair surge capability ensures that the protector can meet the simultaneous longitudinal surge requirement which is typically twice the metallic surge requirement. Each terminal pair has a symmetrical voltage-triggered thyristor characteristic. Overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. How To Order Device Package Carrier Order As TISP70xxF3 D, Small-Outline Tape and Reel TISP70xxF3DR-S *RoHS Directive 2002/95/EC Jan. 27, 2003 including Annex. Specications are subject to change without notice. Users should verify actual device performance in their specic WARNING Cancer and Reproductive Harm applications. The products described herein and this document are subject to specic legal disclaimers as set forth on the www.P65Warnings.ca.gov last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. MARCH 1994 - REVISED SEPTEMBER 2008 *RoHS COMPLIANT TISP70xxF3 (LV) Overvoltage Protector Series Description (continued) The high crowbar holding current helps prevent d.c. latchup as the diverted current subsides. These protectors are guaranteed to voltage limit and withstand the listed lightning surges in both polarities. These low voltage devices are guaranteed to suppress and withstand the listed international lightning surges on any terminal pair. Nine similar devices with working voltages from 100 V to 275 V are detailed in the TISP7125F3 thru TISP7380F3 data sheet. Absolute Maximum Ratings, T = 25 C (Unless Otherwise Noted) A Rating Symbol Value Unit Repetitive peak off-state voltage, 0 C < T < 70 C A 7072F3 V 58 V DRM 7082F3 66 Non-repetitive peak on-state pulse current (see Notes 1 and 2) 1/2 (Gas tube differential transient, 1/2 voltage wave shape) 240 2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape) 85 1/20 (ITU-T K.22, 1.2/50 voltage wave shape, 25 resistor) 45 8/20 (IEC 61000-4-5, combination wave generator, 1.2/50 voltage wave shape) 80 10/160 (FCC Part 68, 10/160 voltage wave shape) 65 I A PPSM 4/250 (ITU-T K.20/21, 10/700 voltage wave shape, simultaneous) 60 0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape) 50 5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single) 50 5/320 (FCC Part 68, 9/720 voltage wave shape, single) 50 10/560 (FCC Part 68, 10/560 voltage wave shape) 45 10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape) 40 Non-repetitive peak on-state current, 0 C < T < 70 C (see Notes 1 and 3) A I TSM 50 Hz, 1 s 4.3 A Initial rate of rise of on-state current, Linear current ramp, Maximum ramp value < 38 A di /dt 250 A/s T Junction temperature T -65 to +150 C J Storage temperature range T -65 to +150 C stg NOTES: 1. Initially, the TISP device must be in thermal equilibrium at the specified T . The surge may be repeated after the TISP device A returns to its initial conditions. The rated current values may be applied singly either to the R to G or to the T to G or to the T . to R terminals. Additionally, both R to G and T to G may have their rated current values applied simultaneously (in this case the total G terminal current will be twice the above rated current values). 2. See Thermal Information for derated I values 0 C < T < 70 C and Applications Information for details on wave shapes. PPSM A 3. Above 70 C, derate I linearly to zero at 150 C lead temperature. TSM MARCH 1994 - REVISED SEPTEMBER 2008 Specications are subject to change without notice. Users should verify actual device performance in their specic applications. The products described herein and this document are subject to specic legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.