CDB5364 Cirrus Logic

CDB5364 Evaluation Board for CS5364 Features Description Single-Ended to Differential Analog Inputs The CDB5364 evaluation board is an excellent means for quickly evaluating the CS5364 24-bit, 192 kHz A/D 3.3 V Logic Interface converter. Evaluation requires only a digital signal ana- lyzer, an analog signal source, and a power supply. Connection for DSP Serial I/O On-board DIP switches configure the CS5364 in Stand- Alone mode, avoiding the need for a PC. Windows-Compatible CDB5364 Software For software-based device configuration, the Control Supplied by Cirrus to Configure the CS5364 Port mode is used by attaching a host PC to the Evalu- ation Board and executing the provided FlexGUI On-Board CS8406 to Generate S/PDIF and software. EIAJ-340 Digital Audio Requires Only an Analog Signal Source, Power Supplies and, optionally, a PC for a Complete ORDERING INFORMATION Analog-to-Digital-Converter Evaluation System CDB5364 Evaluation Board RS232 8051 Micro USB Control IC or SPI S/PDIF Output Optical CS5364 A/D CS8406 4 AES/EBU Analog Ain+ RCA 4 Clks/Data FPGA S/PDIF Coaxial Input 4 Jacks Ain- Transmitter Buffers Buffers Audio Clks/Data Copyright Cirrus Logic, Inc. 2005 SEPTEMBER 05 (All Rights Reserved) CDB5364 TABLE OF CONTENTS 1. CDB5364 System Overview..................................................................................................................... 3 2. Quick-Start Guide..................................................................................................................................... 3 3. Detailed Board Features .......................................................................................................................... 3 3.1 Stand-Alone Evaluation ............................................................................................................ 3 3.1.1 S1 and S4 Switch Operation .......................................................................................... 4 3.2 Control-Port Evaluation ............................................................................................................ 5 3.3 FlexGUI Hi-Level View ............................................................................................................. 6 3.4 FlexGUI Low-Level View .......................................................................................................... 7 3.5 Bit Definitions ........................................................................................................................... 8 3.5.1 CS5364 Bits .................................................................................................................... 8 3.5.2 FPGA Bits ....................................................................................................................... 8 4. CDB5364 Hardware................................................................................................................................. 9 4.1 Input and Output Connectors ................................................................................................... 9 4.2 Switches ................................................................................................................................. 10 4.3 User Configuration Jumpers .................................................................................................. 10 4.4 Reserved Factory Programming Jumpers ............................................................................. 10 4.5 Power Supply Circuitry ........................................................................................................... 11 4.6 Grounding and Power Supply Treatment ............................................................................... 11 4.7 FPGA Hardware ..................................................................................................................... 11 4.8 CS8406 S/PDIF Audio Transmitter ........................................................................................ 11 4.9 Serial Audio Interface ............................................................................................................. 11 4.10 Analog Input Buffer .............................................................................................................. 11 5. Schematics............................................................................................................................................. 12 6. Board Layout and Routing Plots ........................................................................................................... 21 7. Revision History ..................................................................................................................................... 24 LIST OF FIGURES Figure 1. Hi-Level FlexGUI View ................................................................................................................. 6 Figure 2. FlexGUI Low-Level Register View ............................................................................................... 7 Figure 3. FPGA Low-Level Bit View ............................................................................................................ 8 Figure 4. CS5364 (Schematic page 1) ...................................................................................................... 12 Figure 5. Clock Generation (Schematic page 2) ....................................................................................... 13 Figure 6. FPGA (Schematic page 3) ......................................................................................................... 14 Figure 7. Control Port (Schematic page 4) ................................................................................................ 15 Figure 8. Clock and Data Buffers (Schematic page 5) .............................................................................. 16 Figure 9. CD8406 S/PDIF Output (Schematic page 6) ............................................................................. 17 Figure 10. Analog Inputs 1 to 4 (Schematic page 7) ................................................................................. 18 Figure 11. Analog Inputs 5 to 8 (Schematic page 8) ................................................................................. 19 Figure 12. Power (Schematic page 9) ....................................................................................................... 20 Figure 13. Top Silkscreen ......................................................................................................................... 21 Figure 14. Top Layer ................................................................................................................................. 22 Figure 15. Bottom Layer ............................................................................................................................ 23 LIST OF TABLES Table 1. CDB5364 Input and Output Connectors ....................................................................................... 9 Table 2. CDB5364 Switches ..................................................................................................................... 10 Table 3. User Jumpers .............................................................................................................................. 10 Table 4. CDB5364 Reserved Jumpers ..................................................................................................... 10 2 DS625DB1