CS4341A 24-Bit, 192 kHz Stereo DAC with Volume Control Features Description The CS4341A is a complete stereo digital-to-analog sys- z 101 dB Dynamic Range tem including digital interpolation, fourth-order delta- z -91 dB THD+N sigma digital-to-analog conversion, digital de-emphasis, z +3.3 V or +5 V Power Supply volume control, channel mixing and analog filtering. The z 50 mW with 3.3 V supply advantages of this architecture include: ideal differential linearity, no distortion mechanisms due to resistor z Low Clock Jitter Sensitivity matching errors, no linearity drift over time and tempera- z Filtered Line-level Outputs ture and a high tolerance to clock jitter. z On-Chip Digital De-emphasis for 32, 44.1, The CS4341A accepts data at all standard audio sample and 48 kHz rates up to 192 kHz, consumes very little power, oper- z ATAPI Mixing ates over a wide power supply range and is pin z Digital Volume Control with Soft Ramp compatible with the CS4341, as described in section 3.1. These features are ideal for DVD audio players. 94 dB Attenuation 1 dB Step Size Zero Crossing Click-Free Transitions z Up to 200-kHz Sample Rates z Automatic Mode Detection for Sample Rates between 4 and 200 kHz ORDERING INFORMATION CS4341A-KS 16-pin SOIC, -10 to 70 C z Pin Compatible with the CS4341 CS4341A-KSZ, Lead Free 16-pin SOIC, -10 to 70 C CDB4341A Evaluation Board SCL/CCLK SDA/CDIN AD0/CS MUTEC Control Port External Interface Mute Control RST Interpolation Filter Volume Control DAC Analog Filter AOUTA SCLK Mixer LRCK SDIN Interpolation Filter Volume Control Analog Filter AOUTB DAC 2 MCLK Cirrus Logic, Inc. Copyright Cirrus Logic, Inc. 2004 CS4341A TABLE OF CONTENTS 1. PIN DESCRIPTION ................................................................................................................... 5 2. TYPICAL CONNECTION DIAGRAM ...................................................................................... 6 3. APPLICATIONS ........................................................................................................................ 7 3.1 Upgrading from the CS4341 to the CS4341A .................................................................... 7 3.2 Sample Rate Range/Operational Mode Detect .................................................................. 7 3.2.1 Auto-Detect Enabled ............................................................................................. 7 3.2.2 Auto-Detect Disabled ............................................................................................ 7 3.3 System Clocking ................................................................................................................ 8 3.4 Digital Interface Format ...................................................................................................... 8 3.5 De-Emphasis Control ......................................................................................................... 9 3.6 Recommended Power-up Sequence ................................................................................. 9 3.7 Popguard Transient Control ........................................................................................... 10 3.7.1 Power-up ............................................................................................................. 10 3.7.2 Power-down ........................................................................................................ 10 3.7.3 Discharge Time ................................................................................................... 10 3.8 Grounding and Power Supply Arrangements .................................................................. 10 3.9 Control Port Interface ....................................................................................................... 11 3.9.1 Rise Time for Control Port Clock ......................................................................... 11 3.9.2 MAP Auto Increment ........................................................................................... 11 2 3.9.3 I C Mode ............................................................................................................. 12 2 3.9.3a I C Write ............................................................................................... 12 2 3.9.3b I C Read .............................................................................................. 13 3.9.4 SPI Mode ............................................................................................................ 14 3.9.4a SPI Write .............................................................................................. 14 3.10 Memory Address Pointer (MAP) .............................................................................. 15 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. 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