CS4353 3.3 V Stereo Audio DAC with 2 V Line Output RMS Features Description Multi-bit Delta-Sigma Modulator The CS4353 is a complete stereo digital-to-analog sys- tem including digital interpolation, fifth-order multi-bit 106 dB A-weighted Dynamic Range delta-sigma digital-to-analog conversion, digital de-em- -93 dB THD+N phasis, analog filtering, and on-chip 2 V line-level RMS driver from a 3.3 V supply. Single-ended Ground Centered Analog Architecture The advantages of this architecture include ideal differ- No DC-blocking Capacitors Required ential linearity, no distortion mechanisms due to resistor matching errors, no linearity drift over time and temper- Integrated Step-up/Inverting Charge Pump ature, high tolerance to clock jitter, and a minimal set of Filtered Line-level Outputs external components. Selectable 1 or 2 V Full-scale Output RMS The CS4353 is available in a 24-pin QFN package in Low Clock-jitter Sensitivity Commercial (-40C to +85C) grade. The CDB4353 Low-latency Digital Filtering Customer Demonstration Board is also available for de- vice evaluation and implementation suggestions. Supports Sample Rates up to 192 kHz Please see Ordering Information on page 25 for com- 24-bit Resolution plete details. +3.3 V Charge Pump and Core Logic, +3.3 V These features are ideal for cost-sensitive, 2-channel Analog, and +0.9 to 3.3 V Interface Power audio systems including video game consoles, DVD Supplies players and recorders, A/V receivers, set-top boxes, Low Power Consumption digital TVs, mini-component systems, and mixing 24-pin QFN, Lead-free Assembly consoles. Digital Core Logic and Interface Supply (VL) Charge Pump Supply (VCP) Analog Supply (VA) +0.9 V to +3.3 V +3.3 V +3.3 V Step-Up Power-On Reset +VA H Reset Inverting -VA H Ground-Centered, Hardware Hardware 2 Vrms Line Level Outputs Control Control Left Channel Serial PCM Serial Interpolation Multibit Audio Pseudo Diff. Input DAC Filters Modulator Audio Port Input Right Channel Auto Speed Mode Detect Copyright Cirrus Logic, Inc. 2011 MAY 11 (All Rights Reserved) CS4353 TABLE OF CONTENTS 1. PIN DESCRIPTIONS ............................................................................................................................. 4 2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6 RECOMMENDED OPERATING CONDITIONS .................................................................................... 6 ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 6 DAC ANALOG CHARACTERISTICS .................................................................................................... 7 COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ........................................ 8 SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE ................................................... 9 DIGITAL INTERFACE CHARACTERISTICS ....................................................................................... 10 INTERNAL POWER-ON RESET THRESHOLD VOLTAGES ............................................................. 10 DC ELECTRICAL CHARACTERISTICS .............................................................................................. 11 3. TYPICAL CONNECTION DIAGRAM ................................................................................................... 12 4. APPLICATIONS ................................................................................................................................... 13 4.1.1 Ground-centered Outputs ...................................................................................................... 13 4.1.2 Full-scale Output Amplitude Control ......................................................................................13 4.1.3 Pseudo-differential Outputs ................................................................................................... 13 4.9.1 Power-up Sequences ............................................................................................................ 19 4.9.1.1 External RESET Power-up Sequence ....................................................................... 19 4.9.1.2 Internal Power-on Reset Power-up Sequence .......................................................... 19 4.9.2 Power-down Sequences ....................................................................................................... 19 4.9.2.1 External RESET Power-down Sequence .................................................................. 19 4.9.2.2 Internal Power-on Reset Power-down Sequence ...................................................... 19 4.10.1 Capacitor Placement ........................................................................................................... 20 5. DIGITAL FILTER RESPONSE PLOTS ......................................................................................... 21 6. PARAMETER DEFINITIONS ................................................................................................................ 23 7. PACKAGE DIMENSIONS .................................................................................................................... 24 8. ORDERING INFORMATION ............................................................................................................... 25 9. REVISION HISTORY ........................................................................................................................... 25 2 DS803F3