CS470xx CS470xx Data Sheet The CS470xx family is a new generation of audio Features system-on-a-chip (ASOC) processors targeted at high Cost-effective, High-performance 32-bit DSP fidelity, cost sensitive designs. Derived from the highly successful CS48500 32-bit fixed-point audio enhancement 300,000,000 MAC/S (multiply accumulates per second) processor family, the CS470xx further simplifies system Dual MAC cycles per clock design and reduces total system cost by integrating the S/ PDIF Rx, S/PDIF Tx, analog inputs, analog outputs, and 72-bit accumulators are the highest precision in the SRCs. For example, a hardware SRC can down-sample a industry 192 kHz S/PDIF stream to a lower Fs to reduce memory 32K x 32-bit SRAM with three 2K blocks assignable to and MIPS requirements for processing. This integration either Y data or program memory effectively reduces the chip count from 3 to 1, which allows Integrated DAC and ADC Functionality smaller, less expensive board designs. 8 Channels of 24-bit DAC output: 108dB DR, 98 dB Target applications include: THD+N Automotive head units and outboard amplifiers 4 Channels of 24-bit ADC input: 105dB DR, 98 dB Automotive processors and automotive integration hubs THD+N Integrated 5:1 analog mux feeds one stereo ADC Digital TV Configurable Serial Audio Inputs and Outputs MP3 docking stations Integrated 192 kHz S/PDIF Rx AVR and DVD RX Integrated 192 kHz S/PDIF Tx DSP controlled speakers (subwoofers, sound bars) Supports 32-bit serial data 192 kHz The CS470xx is programmed using the simple yet powerful Supports 32-bit audio sample I/O between DSP chips Cirrus proprietary DSP Composer GUI development and pre-production tuning tool. Processing chains can be TDM I/O modes designed using a drag-and-drop interface to place/utilize Supports Different Sample Rates (Fs) functional macro audio DSP primitives and custom audio filtering blocks. The end result is a software image that is Three integrated hardware SRC blocks downloaded to the DSP via serial control port. Output can be master or slave The Cirrus Framework programming environment offers Supports dual-domain Fs on S/PDIF vs. IS inputs Assembly and C language compilers and other software development tools for porting existing code to the CS470xx DSP Tool Set with Private Keys Protect Customer IP family platform. Integrated Clock Manager/PLL The CS470xx is available in a 100-pin LQFP package with Flexibility to operate from internal PLL, external crystal, exposed pad for better thermal characteristics. Both external oscillator Commercial (0C to +70C) and Automotive (40C to +85C) temperature grades. Input Fs Auto Detection w/ C Acknowledgement Host Control and Boot via IC or SPI Serial Interface Ordering Information: Configurable GPIOs and External Interrupt Input See Section 6 for ordering information. 1.8V Core and a 3.3V I/O that is tolerant to 5V input Low-power Mode features differ on CS47024, CS47028, or CS47048. See Table 3-1. Copyright Cirrus Logic, Inc. 2012 DS787PP9 (All Rights Reserved) ADCs & DACs operate Clock in Single ended or DBC PLL Timers GPIO 2 Differential mode (I C Slave) Manager DAC0 DAC1 2 DAC2 I S / S S/PDIF DAC3 R 8ch C DAC4 x4 2 DAC5 2 Coyote 32-bit Core I S DAC6 text in the CS47048 DSP DAC7 S SRC3 has 8 x8 independent Channels ADC0/1 R 8ch for In or Out DMA S ROM C Stereo Inputs R 4ch On Analog in 3 RAM C PIC 1 x2 ROM ADC2/3 2 I S ROM Y P RAM RAM 2 x2 SPI / I C 2 Control I S / S/PDIF 32K x 32-bit SRAM with three 2K blocks Assignable to Program or Y Data memory CS47048 Block Diagram DS787PP9 2 MUX Memory Bus Peripheral Bus X