WM8325 Processor Power Management Subsystem DESCRIPTION FEATURES Power Management The WM8325 is an integrated power-management subsystem which provides a cost-effective, flexible, single-chip solution for 1 x DC-DC synchronous buck converter power management. It is specifically targeted at the (0.6V - 1.8V, 2.5A, DVS) requirements of a range of low-power portable consumer 1 x DC-DC synchronous buck converter products, but is suitable to any application with a multimedia (0.6V - 1.8V, 1.25A, DVS) processor. The WM8325 is designed to operate as a system 2 x DC-DC synchronous buck converters PMIC supporting the ARM9, ARM11 and ARM Cortex-A (0.85V - 3.4V, 1A) processors, but is also capable of supporting the majority of 1 x LDO regulator (0.9V - 3.3V, 300mA, 1 ) application and mobile processors at the heart of a wide range 2 x LDO regulators (0.9V - 3.3V, 200mA, 1 ) of low-power consumer multimedia applications. 3 x LDO regulators (0.9V - 3.3V, 100mA, 2 ) The start-up behaviour and configuration is fully programmable 2 x Low-noise LDO regulators (1.0V - 3.5V, 200mA, 1 ) in an integrated OTP non-volatile memory. This highly flexible solution helps reduce time-to-market, as changing application 2 x Low-noise LDO regulators (1.0V - 3.5V, 150mA, 2 ) requirements can be very easily accommodated in the OTP. 1 x Alive regulator (0.8V 1.55V, up to 25mA) TM The InstantConfig interface enables an external EEPROM to configure the WM8325. System Control The WM8325 power management subsystem comprises four 2 I C or SPI compatible primary control interface programmable DC-DC converters and eleven LDO regulators Comprehensive interrupt scheme (four of which are low-noise for supplying sensitive analogue Watchdog timer and system reset control subsystems). The integrated OTP bootstrap circuitry controls the start-up sequencing and voltages of the converters and Autonomous power sequencing and fault detection regulators as well as the sequencing of system clocks. OTP memory bootstrap configuration function The DC-DC converters deliver high performance and high efficiency across a wide range of operating conditions. They Additional Features are optimised to support the high load current transients seen Auxiliary ADC for multi-function analogue measurement in modern processor core domains. DC-DC3 / DC-DC4 can be 128-bit pseudo-random unique ID connected together and operated in dual mode to support an Secure Real-Time Clock with wake-up alarm increased current load of up to 1.6A 12 x configurable multi-function (GPIO) pins An on-chip regulator provides power for always-on PMIC Comprehensive clocking scheme: low-power 32kHz RTC functions such as register map and the RTC. The device crystal oscillator, GPIO clock output and 4MHz RC clock provides autonomous backup battery switchover. A low-power for power management LDO is included to support Alive processor power domains external to the WM8325. System LED outputs indicating device power state, and fault status A 12-bit Auxiliary ADC supports a wide range of applications for internal as well as external analogue sampling, such as voltage detection and temperature measurement. Package Options 8 x 8 x 0.85mm, 81-lead QFN package WM8325 includes a crystal oscillator and an internal RC oscillator to generate all clock signals for autonomous system start-up and processor clocking. A Secure Real-time Clock (S- RTC) and alarm function is included, capable of waking up the APPLICATIONS system from low-power modes. A watchdog function is Cellular Handsets provided to ensure system integrity. Smartphones To maximise battery life, highly-granular power management Electronic Books enables each function in the WM8325 subsystem to be independently powered down through a control interface or Portable Media Players alternatively through register and OTP-configurable GPIOs. Mobile Internet Devices The device offers a standby power consumption of <7uA, Electronic Gaming Devices making it particularly suitable for portable applications. Netbooks The WM8325 is supplied in an 8x8mm 81-lead QFN package, Smartbooks ideal for use in portable systems. The WM8325 forms part of Set Top Box the Cirrus series of audio and power management solutions, Digital Picture Frames and is widely register compatible with the WM831X devices. Rev 4.1 Copyright Cirrus Logic, Inc., 2011 2018 MAY 18 WM8325 BLOCK DIAGRAM GND DC-DC1 DC-DC2 DC-DC3 DC-DC4 DBVDD Instant (Exposed Ground Paddle) Buck Buck Buck Buck TM Config Interrupt and Primary Control 0.6 to 1.8V 0.6 to 1.8V 0.85 to 3.4V 0.85 to 3.4V Reset Controller Interface EEPROM 1.25A 2.5A 1A 1A Interface PROGVDD DVS DVS Dual Mode Control System OTP NVM Register Map and VREFC LED1 Status Bootstrap References Application Processor LED2 LED Config & IREFR Interface Driver Unique ID LDO 1 Standard LDO LDO1VOUT 0.9 to 3.3V 300mA LDO1 2VDD LDO 2 Standard LDO LDO2VOUT GPIO1 1 to 4MHz 0.9 to 3.3V 200mA WM8325 GPIO2 RC LDO3VDD LDO 3 Standard LDO GPIO3 Oscillator Multi- 0.9 to 3.3V 200mA LDO3VOUT GPIO4 Power Function Pin LDO4VDD GPIO5 Management LDO 4 Standard LDO (GPIO) Control 0.9 to 3.3V 100mA GPIO6 LDO4VOUT Controller PM Sub- GPIO7 LDO 5 Standard LDO LDO5VDD System GPIO8 0.9 to 3.3V 100mA LDO5VOUT Monitoring GPIO9 LDO 6 Standard LDO LDO6VDD 0.9 to 3.3V 100mA LDO6VOUT LDO 7 Analogue LDO LDO7VOUT ON 1.0 to 3.5V 200mA AP Interface, GPIOs and PM Control LDO7 8VDD LDO 8 Analogue LDO LDO8VOUT 1.0 to 3.5V 200mA LDO 9 Analogue LDO LDO9VOUT 1.0 to 3.5V 150mA GPIO10 LDO9 10VDD LDO 10 Analogue LDO GPIO11 Aux LDO10VOUT 1.0 to 3.5V 150mA ADC GPIO12 LDO 11 Alive LDO CHIP temperature LDO11VOUT 0.8 to 1.55V 25mA LDO 12 Internal LDO LDO12VOUT 2.1V 2mA (Backup Battery Connection) XTO 32.768kHz Real-Time Wake-Up Oscillator Clock Timer LDO 13 Internal LDO XTI LDO13VOUT 2.5V 20mA XOSCGND CLKOUT Internal Power Source PVDD TEST (test function only) Management Clocking and Auxiliary ADC Functions Power Management 2 Rev 4.1 IRQ RESET CS SDA1 SCLK1 SDOUT1 CIFMODE SDA2 SCLK2 DC1GND DC1FB DC1LX DC1VDD DC2GND DC2FB DC2LX DC2VDD DC3GND DC3FB DC3LX DC3VDD DC4GND DC4FB DC4LX DC4VDD