Product Information

CCE451024QFN

CCE451024QFN electronic component of Dialog Semiconductor

Datasheet
Interface - Specialised IO-Link Master Phy with integrated frame handler QFN24

Manufacturer: Dialog Semiconductor
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4000: USD 1.2106 ea
Line Total: USD 4842.4

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MOQ: 4000  Multiples: 4000
Pack Size: 4000
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Ships to you between Wed. 22 May to Fri. 24 May

MOQ : 4000
Multiples : 4000

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CCE451024QFN
Dialog Semiconductor

4000 : USD 1.2106

     
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CCE4510 IO-Link Master PHY with integrated Frame Handler General Description The CCE4510 is a high-voltage interface IC with overvoltage detection as well as high temperature and high current protection, based upon a 0.35 m HV-CMOS technology. Typical applications are industrial sensors or actuators, which should support the IO-Link standard. To improve the application performance, an integrated IO-Link frame handler is provided, which automates most of the lower layer communication tasks. This reduces the microcontroller loads significantly, thus gaining more performance for other tasks, even if slower microcontrollers are used. A variety in fields of application is given by different packaging and configuration options. 1.1 Features 1.2 Schematic Two IO-Link compliant channels with 1 A peak driving current Wide voltage range 8-32 V Transceiver mode (SIO) Monitoring, Status LED Drivers, Integrated UART (COM1-3) RXD1 High Temperature Protection, TXEN1 Hardware frame handler (support Overvoltage Detection TXD1 for all IO-Link v1.1 frame types) SDX1 SEN1 Fully IO-Link v1.1 compliant SEN2 Possibility to use IO-Link ports as RXD2 GATE1 Gate master or device TXEN2 Current Sense Driver GATE2 TXD2 Completely automated wake-up SDX2 procedure for master Two status LED drivers Channel 1/2 INTX LP1 Synchronization features for IO SSX Input LP2 Link channels and LEDs over SCLK Stage multiple chips MOSI Includes NMOS gate drivers to MISO switch power supply of devices Driver CQ1 Control Supports feed through of clock CQ2 XTAL1 Temperature and supply voltage Quarz Oscillator monitoring and protection XTAL2 Overload protection for channels CCE4510 and connected devices Ideal fit for 2/4/8/16-port IO Link master applications Figure 1: Block Diagram Evaluation boards available Datasheet Revision 1.6 22-JUL-2020 CFR0011-120-00 1 of 39 2020 Dialog Semiconductor SPI CH2 CTRL CH1 CTRL TP2 CLK Logic Core TP1 SIO Control, UART, Framehandler CLK EN TEMP LED1 LED2 LM2 LM1 VDDA VDDD GND VCCCCE4510 IO-Link Master PHY with integrated Frame Handler Contents General Description ............................................................................................................................ 1 1.1 Features ................................................................................................................................ 1 1.2 Schematic ............................................................................................................................. 1 2 Pinout ............................................................................................................................................. 5 2.1 Package ................................................................................................................................ 5 2.2 Pin Descriptions .................................................................................................................... 6 3 Absolute Maximum Ratings ......................................................................................................... 7 4 Electrical Characteristics ............................................................................................................. 8 4.1 General Parameters .............................................................................................................. 8 4.2 IO-Link Channels .................................................................................................................. 8 4.3 NMOS Gate Drivers .............................................................................................................. 9 4.4 Oscillator ............................................................................................................................... 9 4.5 Digital Pads ......................................................................................................................... 10 4.6 Serial Peripheral Interface .................................................................................................. 10 4.7 Current Sensing .................................................................................................................. 10 4.8 Monitoring Thresholds......................................................................................................... 11 4.9 LEDs.................................................................................................................................... 11 5 Functional Description ............................................................................................................... 11 5.1 Clocking .............................................................................................................................. 11 5.2 Operational Modes .............................................................................................................. 11 5.2.1 Standard I/O (SIO) ............................................................................................... 12 5.2.2 UART ................................................................................................................... 12 5.2.3 Frame Handler ..................................................................................................... 12 5.3 Interrupt Handling ................................................................................................................ 14 5.3.1 Mode 1 ................................................................................................................. 14 5.3.2 Mode 2 ................................................................................................................. 14 5.3.3 Interrupt Masking ................................................................................................. 15 5.4 Protection Features ............................................................................................................. 15 5.4.1 Current Sensing ................................................................................................... 16 5.4.2 Voltage/Temperature Monitoring ......................................................................... 17 5.5 Additional IO-Link Features ................................................................................................ 17 5.5.1 Automated Wake-Up ........................................................................................... 17 5.5.2 Cycle Timer .......................................................................................................... 17 5.5.3 Channel Synchronization ..................................................................................... 18 5.5.4 LED Drivers ......................................................................................................... 18 5.6 Serial Peripheral Interface .................................................................................................. 19 5.6.1 Transaction Format .............................................................................................. 19 5.6.2 MOSI Format ....................................................................................................... 19 5.6.3 MISO Format ....................................................................................................... 20 5.6.4 MISO Status Nibble ............................................................................................. 20 5.7 Register Description ............................................................................................................ 21 5.7.1 Register Overview ............................................................................................... 21 5.7.2 MODE1/2 (0x20/0x40) ......................................................................................... 23 5.7.3 OVLD1/2 (0x21/0x41) .......................................................................................... 23 5.7.4 SHRT1/2 (0x22/0x42) .......................................................................................... 24 Datasheet Revision 1.6 22-JUL-2020 CFR0011-120-00 2 of 39 2020 Dialog Semiconductor

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
ADESTO
Adesto Technologies
Dialog Semiconductor GmbH
DLG
Echelon / Adesto
Echelon Corporation

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