DA14580 Low Power Bluetooth Smart SoC
DATASHEET - FINAL
JANUARY 29, 2015 V3.1
DA14580
Low Power Bluetooth Smart SoC
84 kB ROM
General description
8 kB Retention SRAM
The DA14580 integrated circuit has a fully integrated
Power management
radio transceiver and baseband processor for Blue-
Integrated Buck/Boost DC-DC converter
tooth Smart. It can be used as a standalone applica-
P0, P1, P2 and P3 ports with 3.3 V tolerance
tion processor or as a data pump in hosted systems.
Easy decoupling of only 4 supply pins
The DA14580 supports a flexible memory architecture Supports coin (typ. 3.0 V) and alkaline (typ. 1.5 V)
for storing Bluetooth profiles and custom application battery cells
code, which can be updated over the air (OTA). The 10-bit ADC for battery voltage measurement
qualified Bluetooth Smart protocol stack is stored in a Digital controlled oscillators
dedicated ROM. All software runs on the ARM Cor- 16 MHz crystal (20 ppm max) and RC oscillator
tex -M0 processor via a simple scheduler. 32 kHz crystal (50 ppm, 500 ppm max) and
RCX oscillator
The Bluetooth Smart firmware includes the L2CAP ser-
General purpose, Capture and Sleep timers
vice layer protocols, Security Manager (SM), Attribute
Digital interfaces
Protocol (ATT), the Generic Attribute Profile (GATT)
General purpose I/Os: 14 (WLCSP34 package),
and the Generic Access Profile (GAP). All profiles pub-
24 (QFN40 package), 32 (QFN48 package)
lished by the Bluetooth SIG as well as custom profiles
2 UARTs with hardware flow control up to 1 MBd
are supported.
SPI+ interface
The transceiver interfaces directly to the antenna and I2C bus at 100 kHz, 400 kHz
is fully compliant with the Bluetooth 4.1 standard. 3-axes capable Quadrature Decoder
Analog interfaces
The DA14580 has dedicated hardware for the Link
4-channel 10-bit ADC
Layer implementation of Bluetooth Smart and interface
Radio transceiver
controllers for enhanced connectivity capabilities.
Fully integrated 2.4 GHz CMOS transceiver
Single wire antenna: no RF matching or RX/TX
Features
switching required
Complies with Bluetooth V4.1, ETSI EN 300 328 and Supply current at VBAT3V:
EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 TX: 3.4 mA, RX: 3.7 mA (with ideal DC-DC)
(US) and ARIB STD-T66 (Japan) 0 dBm transmit output power
Processing power -20 dBm output power in Near Field Mode
16 MHz 32 bit ARM Cortex-M0 with SWD inter- -93 dBm receiver sensitivity
face Packages:
Dedicated Link Layer Processor WLCSP 34 pins, 2.436 mm x 2.436 mm
AES-128 bit encryption Processor QFN 40 pins, 5 mm x 5 mm
Memories QFN 48 pins, 6 mm x 6 mm
32 kB One-Time-Programmable (OTP) memory KGD (wafer, dice)
42 kB System SRAM
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System diagram
2014 Dialog Semiconductor 1 www.dialog-semiconductor.comDA14580 Low Power Bluetooth Smart SoC
1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3. System overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 ARM CORTEX M0 CPU. . . . . . . . . . . . . . . . . . 9
3.2 BLUETOOTH SMART. . . . . . . . . . . . . . . . . . . . 9
3.2.1 BLE Core . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.2 Radio Transceiver . . . . . . . . . . . . . . . . . 10
3.2.3 SmartSnippets
3.3 MEMORIES. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 FUNCTIONAL MODES . . . . . . . . . . . . . . . . . . 11
3.5 POWER MODES. . . . . . . . . . . . . . . . . . . . . . . 12
3.6 INTERFACES . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6.1 UARTs . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6.2 SPI+. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.6.3 I2C interface . . . . . . . . . . . . . . . . . . . . . 12
3.6.4 General purpose ADC . . . . . . . . . . . . . . 13
3.6.5 Quadrature decoder. . . . . . . . . . . . . . . . 13
3.6.6 Keyboard controller . . . . . . . . . . . . . . . . 13
3.6.7 Input/output ports. . . . . . . . . . . . . . . . . . 13
3.7 TIMERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.7.1 General purpose timers . . . . . . . . . . . . . 13
3.7.2 Wake-Up timer. . . . . . . . . . . . . . . . . . . . 14
3.7.3 Watchdog timer . . . . . . . . . . . . . . . . . . . 14
3.8 CLOCK/RESET . . . . . . . . . . . . . . . . . . . . . . . . 14
3.8.1 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.8.2 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.9 POWER MANAGEMENT . . . . . . . . . . . . . . . . 15
4. Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5. Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
6. Package information . . . . . . . . . . . . . . . . . . . . . . 154
6.1 MOISTURE SENSITIVITY LEVEL (MSL) . . . 154
6.2 WLCSP HANDLING . . . . . . . . . . . . . . . . . . . 154
6.3 SOLDERING INFORMATION . . . . . . . . . . . . 154
6.4 PACKAGE OUTLINES . . . . . . . . . . . . . . . . . 155
2014 Dialog Semiconductor 2 Final - January 29, 2015 v3.1