RM25C128C-LTAI-B Dialog Semiconductor

RM25C128C-L 128 Kbit 1.65V Minimum Non-volatile Serial EEPROM Memory SPI Bus Preliminary Datasheet Features Memory array: 128 Kbit non-volatile serial EEPROM memory Single supply voltage: 1.65V - 3.6V Serial peripheral interface (SPI) compatible -Supports SPI modes 0 and 3 1.6 MHz maximum clock rate for normal read 10 MHz maximum clock rate for fast read Flexible Programming - Byte/Page Program (1 to 64 Bytes) - Page size: 64 Bytes Low Energy Byte Write -Byte Write consuming 50 nJ Low power consumption -0.25 mA active Read current (Typical) -1 mA active Write current (Typical) -2.2 A power down current (Typical) Fast Page Write -Page Write in 1 ms (64 byte page) -Byte Write within 25 s Self-timed erase and write cycles Unlimited read cycles Page or chip erase capability 8-lead SOIC and TSSOP packages RoHS-compliant and halogen-free packaging Data Retention: 10 years Endurance: 10,000 Write Cycles Based on Adesto s proprietary CBRAM technology Description The Mavriq RM25C128C-L is a 128 Kbit, serial EEPROM memory device that utilizes Adesto s CBRAM resistive technology. The memory devices use a single low-voltage supply ranging from 1.65V to 3.6V. The MavriqRM25C-Series family is accessed through a 4-wire SPI interface consisting of a Serial Data Input (SDI), Serial Data Output (SDO), Serial Clock (SCK), and Chip Select (CS). The maximum clock (SCK) frequency in normal read mode is 1.6MHz. In fast read mode the maximum clock frequency is 10MHz. Writing into the device can be done from 1 to 64 bytes at a time. All writing is internally self-timed. The device also features an Erase which can be performed on 64-byte pages or on the whole chip. DS-RM25C128C077C11/2017The device has both Byte Write and Page Write capability. Page Write is 64 bytes. The Byte Write operation of Mavriq memory consumes only 10% of the energy consumed by a Byte Write operation of EEPROM devices of similar size. The Page Write operation of Mavriq memory is 4-6 times faster than the Page Write operation of similar EEPROM devices. Both random and sequential reads are available. Sequential reads are capable of reading the entire memory in one operation. 1. Block Diagram Figure 1-1. Block Diagram Status I/O Buffers and Data Registers Latches & VCC Control Logic Page Buffer SCK SDI Y-Decoder SDO SPI Interface CS WP HOLD Address 32 Kb - 512 Kb Latch CBRAM & Memory GND Counter RM25C128C 2 DS-RM25C128C077C11/2017 X-Decoder