RM25C256C-LSNI-B Dialog Semiconductor

RM25C256C-L 256 Kbit 1.65V Minimum Non-volatile Serial EEPROM SPI Bus Preliminary Datasheet Features Memory array: 256 Kbit non-volatile serial EEPROM memory Single supply voltage: 1.65V - 3.6V Serial peripheral interface (SPI) compatible -Supports SPI modes 0 and 3 1.6 MHz maximum clock rate for normal read 10 MHz maximum clock rate for fast read Flexible Programming - Byte/Page Program (1 to 64 Bytes) - Page size: 64 Bytes Low Energy Byte Write -Byte Write consuming 50 nJ Low power consumption -0.25 mA active Read current (Typical) -1 mA active Write current (Typical) -2.2 A power down current (Typical) Fast Page Write -Page Write in 3 ms (64 byte page) -Byte Write within 60 s Industrys lowest read cycle latency Unlimited read cycles Page or chip erase capability 8-lead SOIC, TSSOP and WLCSP packages RoHS-compliant and halogen-free packaging Data Retention: >40 years at 125C Endurance: 100,000 Write Cycles (for both byte and page write cycles) - No degradation across temperature range No data loss under UV exposure on bare die or WLCSP Based on Adesto s proprietary CBRAM technology Description The Adesto RM25C256C-L is a 256 Kbit, serial EEPROM device that utilizes Adesto s CBRAM resistive memory technology. The memory devices use a single low-voltage supply ranging from 1.65V to 3.6V. The RM25C-Series family is accessed through a 4-wire SPI interface consisting of a Serial Data Input (SDI), Serial Data Output (SDO), Serial Clock (SCK), and Chip Select (CS). The maximum clock (SCK) frequency in normal read mode is 1.6 MHz. In fast read mode the maximum clock frequency is 10 MHz. DS-RM25C256C078C11/2017Writing into the device can be done from 1 to 64 bytes at a time. All writing is internally self-timed. The device also features an Erase which can be performed on 64 byte pages or on the whole chip. Adesto s EEPROM endurance can be as much as 40X higher than industry standard EEPROM devices operating in byte write mode at 85C. Unlike EEPROMs based on floating gate technology (which require read-modify-write on a whole page for every write operation) CBRAM write endurance is based on the capability to write each byte individually, irrespective of whether the user writes single bytes or an entire page. Additionally, unlike floating gate technology, CBRAM does not experience any degradation of endurance across the full temperature range. By contrast, in order to modify a single byte, most EEPROMs modify and write full pages of 32, 64 or 128 bytes. This provides significantly less endurance for floating gate devices used in byte write mode when compared to page write mode. The device has both Byte Write and Page Write capability. Page Write is 64 bytes. The Byte Write operation of CBRAM consumes only 10% of the energy consumed by a Byte Write operation of EEPROM devices of similar size. The Page Write operation of CBRAM is 4-6 times faster than the Page Write operation of similar EEPROM devices. Both random and sequential reads are available. Sequential reads are capable of reading the entire memory in one operation. RM25C256C 2 DS-RM25C256C078C11/2017