1300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com Cmod S6 FPGA Board Reference Manual Revised January 30, 2014 This manual applies to the Cmod S6 rev. A Overview The Digilent Cmod S6 is a small, 48-pin DIP form factor board built around a Xilinx Spartan 6 LX4 FPGA. The board also includes a programming ROM, clock source, USB programming and data transfer circuit, power supplies, and basic I/O devices. There are 46 FPGA I/O signals that are routed to 100-mil-spaced through-hole pins, making the Cmod S6 well suited for use with solderless breadboards. At just .7 by 2.6 inches, it can also be loaded in a standard socket and used in embedded systems. Spartan 6 XC6SLX4-2CPG196 FPGA features include: 600 slices (each with 4 LUTs and eight flip-flops) 8 DSP slices 216Kbits of block RAM 2 CMTs (4 DCMs and 2 PLLs). Cmod S6 features include: 16Mbyte Spansion Quad SPI Flash for storing FPGA configurations and/or user data 46 FPGA GPIO signals brought to DIP pins Two on-board clock sources 4 user LEDs and 2 user buttons On-board Adept USB2 port for configuration, test and The Cmod S6. communications interfaces. 1 Configuration The FPGA on the Cmod S6 can be configured using the on-board Adept USB interface or from the on-board Quad- SPI Flash memory. Configuration files can be programmed using Xilinx s ISE 14.2 (or higher) development tools, using Digilent s Adept system, or using older versions of the Xilinx tools if Adept is also installed. Xilinx s ISE/Impact programming tool and Digilent s Adept tool will recognize the board and/or FPGA when the board is attached to a PC using a Type-A to micro-B USB cable. Xilinx s iMPACT tool and Digilent s Adept can both be used to program the FPGA, and iMPACT can also be used to program the on-board QSPI Flash. Please refer to the ISE and/or Adept documentation for more information on using the configuration software. Copyright Digilent, Inc. All rights reserved. DOC : 502-282 Page 1 of 4 Other product and company names mentioned may be trademarks of their respective owners. Cmod S6 FPGA Board Reference Manual When using Digilent s Adept software for programming, a dialog box available from the Config tab can be used to select a configuraiton file. Pressing the Program button will program the FPGA with the selected file. This may result in a warning that the configuration file was built for an unknown device however, this warning can be ignored. When using Xilinx s iMPACT 14.2 (or higher) software for programming, a .bit file can be associated with the FPGA by right-clicking on the FPGA icon, selecting the desired .bit file, and clicking Program. On power-up, if the FPGA detects a valid bitstream stored in the Quad SPI flash memory, the FPGA will automatically configure itself with that bitstream. If necessary, the user can reconfigure the FPGA with a different bitstream at any point after power-up using iMPACT or Adept. 2 FPGA The Cmod S6 features a Xilinx Spartan 6 XC6SLX4-2CPG196 FPGA. Of the 92 available unshared FPGA I/O pins, 46 are routed to through-hole pins on the DIP module, 24 are not connected, 14 are used by the programming interface, and 7 drive on-board I/Os (4 leds, 2 pushbuttons, and 2 clock inputs). Several of the 46 signals connected to FPGA pins are routed to clock buffers, and several are routed to matched pairs. Please see the schematic for more information. The Spartan 6 LX4 FPGA includes 3,840 6-LUT logic cells, 4,800 flip-flops, 216Kb of block RAM, 8 DSP slices, and two clock management tiles, each with two DCMs and one PLL. The fabric can support internal clock speeds above 400MHz, allowing the Cmod S6 to host high-speed or complex designs. Please see the Spartan 6 user manual available at www.xilinx.com for more detailed information. 3 Power The Cmod S6 can be powered either from a USB-connected computer, or from a power source connected to DIP pin 24 that delivers voltage in the range of 5VDC to 15VDC (the power input on pin 24 is most useful when the board is used in an embedded system or in a solderless breadboard). The two sources are diode-OR ed on the board, so both may be connected simultaneously. The FPGA and other on-board devices require 3.3VDC and 1.2VDC both of these voltages are generated from the input supply using Texas Instrument s TPS62170 switching regulators. Total current draw depends on FPGA configuration. When about half the FPGA is configured and running at 8MHz, the board consumes about 180mA from the main supply. 4 Clocks An 8MHz and a 1Hz clock are available to the FPGA. Both are generated from the on board USB processor, both are routed to clock inputs on the FPGA, and both run continuously. The 8MHz clock, calledFPGA-GCL, can be used with the FPGA s clock manager to create a wide range of frequencies, even beyond 200MHz. The 1Hz clock provides a simple timing signal for basic experiments and low-frequency needs. Copyright Digilent, Inc. All rights reserved. Page 2 of 4 Other product and company names mentioned may be trademarks of their respective owners.