410-301 Digilent

1300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com NetFPGA-SUME Reference Manual Revised April 11, 2016 This manual applies to the NetFPGA-SUME rev. C Overview Powered by Xilinx s Virtex-7 XC7V690T FPGA, the NetFPGA-SUME is an ideal platform for high-performance and high-density networking design. 32 GTH serial transceivers have been used to provide access to 8 lanes of end-point PCI-E (Gen3 x8), 4 SFP+ (10Gbps) ports, 2 SATA-III ports (6Gbps), and 18 data-rate-adjustable GTH ports through a HPC-FMC The NetFPGA-SUME board. connector and a QTH connector. Wide high-speed memory interfaces in the form of three 72 MBit QDRII+ SRAMs with 36 bit buses and two 4GB DDR3 SODIMMs with 64 bit buses provide an ideal memory solution for common networking applications. Features include: FPGA Expansion Connectors Xilinx Virtex-7 XC7V690T FFG1761-3 QTH Connector (8 GTH transceivers) Memory One HPC FMC Connector (10 GTH transceivers Two 4GB DDR3 SODIMMs (MT8KTF51264Hz- and 68 User I/Os) 1G9E1) One 12-pin Pmod port (8 User I/Os) 64 bit wide buses clocked at Programming 850 MHz (1700 mbps) Micro USB Connector for JTAG programming and Three 72Mbit QDRII+ SRAMs debugging (shared with USB-UART interface) (CY7C25652KV18-500BZXC) Xilinx CPLD XC2C512 for FPGA configuration from 36 bit wide buses clocked at parallel flash 500 MHz (1000 mbps) Power Management Storage Two Linear Technology Power System Managers Two SATA III ports (6 gbps via GTH (LTC2974) transceivers) Provide current measuring on all major Micro-SD Card Slot power rails Two 512Mbit Micron StrataFlash parallel flash Other Features modules (PC28F512G18A) User LEDs and Push Buttons For bitfile storage only PROG Push Button for manual FPGA Reset Communication Interfaces FPGA Configuration LEDs PCI-E Gen3 x8 supporting 8Gbps/lane I2C Mux (PCA9548A) for controlling all onboard Four SFP+ interfaces supporting 10Gbps I2C buses Four globally unique MAC addresses USB-UART I2C Pmod port Copyright Digilent, Inc. All rights reserved. DOC : 502-301 Page 1 of 18 Other product and company names mentioned may be trademarks of their respective owners. NetFPGA-SUME Reference Manual Figure 1. NetFPGA-SUME component callouts. The NetFPGA-SUME is compatible with Xilinx s new high-performance Vivado Design Suite as well as the ISE toolset, which includes ChipScope and EDK. The Virtex-7 XC7V690T FPGA is not a WebPack device, which means full licenses will need to be acquired for these tools in order to build designs that target the NetFPGA-SUME. Licensing information for Vivado can be found here. Academic institutes can make a request to the Xilinx University Program for a donation of full Vivado licenses here. A simplified block diagram that depicts the major features of the NetFPGA-SUME is displayed in Fig. 2. Copyright Digilent, Inc. All rights reserved. Page 2 of 18 Other product and company names mentioned may be trademarks of their respective owners.